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參數(shù)資料
| 型號(hào)： | SP9601AN |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 20 us SETTLING TIME, 12-BIT DAC, PDIP8 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-8 |
| 文件頁(yè)數(shù)： | 4/9頁(yè) |
| 文件大?。?/td> | 160K |
| 代理商： | SP9601AN |
SP9601DS/02
SP9601 12-Bit, Low-Power Voltage Output
Copyright 2000 Sipex Corporation
4
THEORY OF OPERATION
The SP9601 consists of four main functional
blocks – the input shift register, DAC register,
12-Bit D/A converter and a bipolar output volt-
age amplifier, Figure 1.
The input shift register is used to convert the
serial input data stream to a parallel 12–Bit
digital word. The input data is shifted on posi-
tive clock (SCLK) edges when the Chip Select
(CS) signal is in the “l(fā)ow” state. The MSB is
loaded first and LSB last. No shifting of the
input data occurs when the Chip Select (CS)
signal is in the “high” state.
The DAC register is used to store the digital
word which is sent to the DAC. Its value is
updated on the positive transition of the Chip
Select (CS) signal.
In order to reduce the DAC full scale output
sensitivity to the large weighting of the MSB's
found in conventional R-2R resistor ladders, the
3 MSB's are decoded into 8 equally weighted
levels. This reduces the contribution of each bit
by a factor of 4, thus, reducing the output sensi-
tivity to mismatches in resistors and switches by
the same amount. Linearity errors and stability
are both improved for the same reasons.
The DAC itself is implemented with precision
thin-film resistors and CMOS transmission gate
switches. The resistor network is laser-trimmed
to achieve better than 12–Bit accuracy. The D/
A converter is used to convert the 12-bit input
word to a precision voltage.
Table 1. Offset Binary Coding
2 V
REF
2 12
INPUT
OUTPUT
MSB
LSB
1111
V
REF
- 1 LSB
1111
1110
V
REF
- 2 LSB
1000
0000
0001
0 + 1 LSB
1000
0000
0
0000
0001
-V
REF + 1 LSB
0000
-V
REF
1 LSB =
FEATURES...
The SP9601 is a low power 12–Bit Digital-to-
Analog Converter. The converter features
±4.5V
output swings with
±5V supplies. The input
coding format used is standard offset binary,
Table 1.
This Digital-to Analog Converter uses a stan-
dard 3–wire interface compatible with SPI,
QSPI and Microwire. The output settling
time is specified at 30
s to full 12-bit accuracy
when driving a 5K
, 50pF load combination.
The SP9601 Digital-to-Analog Converter is
ideally suited for applications such as ATE,
process controllers, robotics and instrumenta-
tion. The SP9601 is available in an 8-pin 0.15"
SOIC and 0.3" PDIP packages, specified over
commercial and industrial temperature ranges.
PIN ASSIGNMENTS
Pin 1- V
OUT – Voltage Output.
Pin 2- V
DD – +5V Power Supply Input.
Pin 3- SCLK – Serial Clock Input.
Pin 4- D
IN – Serial Data Input.
Pin 5- CS – Chip Select Input.
Pin 6- V
SS– –5V Power Supply Input.
Pin 7- GND – Ground.
Pin 8- V
REF – Reference Input.
VOUT
1
2
3
4
8
7
6
5
VDD
DIN
VREF
VSS
CS
GND
SCLK
SP9601
PINOUT – 8-PIN PLASTIC DIP & SOIC
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| SP9601AS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:12-Bit, Low Power Voltage Output D/A Converter |
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| SP9601BS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:12-Bit, Low Power Voltage Output D/A Converter |
| SP9601JN | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:12-Bit, Low Power Voltage Output D/A Converter |
| SP9601JS | 制造商:SIPEX 制造商全稱:Sipex Corporation 功能描述:12-Bit, Low Power Voltage Output D/A Converter |
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