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參數(shù)資料
| 型號： | SPT7760BIK |
| 廠商： | SIGNAL PROCESSING TECHNOLOGIES |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQFP80 |
| 封裝： | MQUAD-80 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 92K |
| 代理商： | SPT7760BIK |
SPT
4
11/30/01
SPT7760
GENERAL DESCRIPTION
The SPT7760 is one of the fastest monolithic 8-bit parallel
flash A/D converters available today. The nominal conver-
sion rate is 1 GSPS and the analog bandwidth is in
excess of 900 MHz. A major advance over previous flash
converters is the inclusion of 256 input preamplifiers
between the reference ladder and input comparators (see
block diagram). This not only reduces clock transient kick-
back to the input and reference ladder due to a low AC
beta, but also reduces the effect of the dynamic state of
the input signal on the latching characteristics of the input
comparators. The preamplifiers act as buffers and stabi-
lize the input capacitance so that it remains constant over
different input voltage and frequency ranges and therefore
makes the part easier to drive than previous flash convert-
ers. The preamplifiers also add a gain of two to the input
signal so that each comparator has a wider overdrive or
threshold range to “trip” into or out of the active state. This
gain reduces metastable states that can cause errors at
the output.
The SPT7760 has true differential analog and digital data
paths from the preamplifiers to the output buffers (Current
Mode Logic) for reducing potential missing codes while
rejecting common mode noise.
Signature errors are also reduced by careful layout of the
analog circuitry. The output drive capability of the device
can provide full ECL swings into 50
loads.
Figure 1 – SPT7760 Typical Interface Circuit
50
W
50 W
VIN
VRTF
VRTS
*
U1
+
22 W
*
U1
+
22 W
5.2 V
2N2907
VRBS
VRBF
50 W
VIN**
2.0 V
Reference
Convert
U2
50 W
2 V
Pulldown
(Analog)
CLK
5.2 V
V
EE
AGND
DGND
VRM
D8B (OVR)
D7B (MSB)
D6B
D5B
D4B
D3B
D2B
D1B
D0B (LSB)
D8A (OVR)
D7A (MSB)
D6A
D5A
D4A
D3A
D2A
D1A
D0A (LSB)
2.0 V
Pulldown
(Digital)
50
W
.1 F
FB = Ferrite bead
U1 = OP291 or equivalent with low offset/noise.
R = 1 kW; 0.1% matched.
= AGND
= DGND
U2 = ON Semiconductor ECLinPS LITE, MC10EL16,
differential receiver with 250 ps (typ) propagation delay.
U3 = MC10EL16 or MC100EL16.
* = 10 F Tantalum Capacitor and 0.1 F Chip Capacitor
** = Care must be taken to avoid exceeding the maximum rating
for the input, especially during power up sequencing of the
analog input driver.
R
*
5.2 V
FB
DRB
DRA
U3
DRA (DATA READY)
DRB (DATA READY)
50
W
2.0 V Pulldown (Digital)
50
W
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| SPT7814BIJ | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDIP28 |
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| SPT7814AIJ | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CDIP28 |
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相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SPT7810 | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:10-BIT, 20 MSPS, ECL OUTPUT A/D CONVERTER |
| SPT7810ACN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-BIT, 20 MSPS, ECL OUTPUT A/D CONVERTER |
| SPT7810AIJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-BIT, 20 MSPS, ECL OUTPUT A/D CONVERTER |
| SPT7810BCN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-BIT, 20 MSPS, ECL OUTPUT A/D CONVERTER |
| SPT7810BCU | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:10-BIT, 20 MSPS, ECL OUTPUT A/D CONVERTER |
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