參數(shù)資料
型號(hào): SSM2304Z-EVAL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/20頁(yè)
文件大?。?/td> 0K
描述: EVAL BOARD FOR SSM2304Z
標(biāo)準(zhǔn)包裝: 1
放大器類型: D 類
輸出類型: 2 通道(立體聲)
在某負(fù)載時(shí)最大輸出功率 x 通道數(shù)量: 2.4W x 2 @ 4 歐姆
電源電壓: 2.5 V ~ 5 V
工作溫度: -40°C ~ 85°C
板類型: 完全填充
已用 IC / 零件: SSM2304
已供物品:
相關(guān)產(chǎn)品: SSM2304CPZ-REEL-ND - IC AMP AUDIO 2.4W STER D 16LFCSP
SSM2304CPZ-REEL7DKR-ND - IC AMP AUDIO 2.4W STER D 16LFCSP
SSM2304CPZ-REEL7CT-ND - IC AMP AUDIO 2.4W STER D 16LFCSP
SSM2304CPZ-REEL7TR-ND - IC AMP AUDIO 2.4W STER D 16LFCSP
其它名稱: Q3279966
2 W Filterless Class-D
Stereo Audio Amplifier
SSM2304
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2006 Analog Devices, Inc. All rights reserved.
FEATURES
Filterless Class-D amplifier with built-in output stage
2 W into 4 Ω and 1.4 W into 8 Ω at 5.0 V supply with <10% THD
85% efficiency at 5.0 V, 1.4 W into 8 Ω speaker
Better than 98 dB SNR (signal-to-noise ratio)
Available in 16-lead, 3 mm × 3 mm LFCSP
Single-supply operation from 2.5 V to 5.0 V
20 nA ultralow shutdown current
Short-circuit and thermal protection
Pop-and-click suppression
Built-in resistors reduce board component count
Default fixed 18 dB gain and user-adjustable
APPLICATIONS
Notebooks and PCs
Mobile phones
MP3 players
Portable gaming
Portable electronics
Educational toys
GENERAL DESCRIPTION
audio amplifier. It is designed to maximize performance for
portable applications. The application circuit requires a mini-
mum of external components and operates from a single 2.5 V
to 5.0 V supply. It is capable of delivering 2 W of continuous
output power with less than 10% THD + N driving a 4 Ω load
from a 5.0 V supply.
The SSM2304 features a high efficiency, low noise modulation
scheme. It operates with 85% efficiency at 1.4 W into 8 Ω from a
5.0 V supply and has a signal-to-noise ratio (SNR) that is better
than 98 dB. PDM modulation is used to provide lower EMI-
radiated emissions compared with other Class-D architectures.
The SSM2304 has a micropower shutdown mode with a typical
shutdown current of 20 nA. Shutdown is enabled by applying a
logic low to the SD pin.
The architecture of the device allows it to achieve a very low level
of pop and click. This minimizes voltage glitches at the output
during turn-on and turn-off, thus reducing audible noise on
activation and deactivation.
The fully differential input of the SSM2304 provides excellent
rejection of common-mode noise on the input. Input coupling
capacitors can be omitted if the dc input common-mode voltage
is approximately VDD/2.
The SSM2304 also has excellent rejection of power supply noise,
including noise caused by GSM transmission bursts and RF
rectification.
The SSM2304 has a preset gain of 18 dB, which can be reduced
by using external resistors.
The SSM2304 is specified over the commercial temperature range
(40°C to +85°C). It has built-in thermal shutdown and output
short-circuit protection. It is available in a 16-lead, 3 mm × 3 mm
lead-frame chip scale package (LFCSP).
FUNCTIONAL BLOCK DIAGRAM
FET
DRIVER
MODULATOR
0.1F
VDD
INTERNAL
OSCILLATOR
OUTR+
OUTR–
OUTL+
OUTL–
BIAS
FET
DRIVER
MODULATOR
INR+
VBATT
2.5V TO 5.0V
INR–
SHUTDOWN
INL+
INL–
GND
10F
22nF1
1 INPUT CAPS ARE OPTIONAL IF INPUT DC COMMON-MODE
VOLTAGE IS APPROXIMATELY VDD/2.
22nF1
300k
GAIN = 300k/(47k + Rext)
47k
Rext
300k
22nF1
SD
LEFT IN+
LEFT IN–
RIGHT IN–
RIGHT IN+
SSM2304
06
16
2-
0
01
Figure 1.
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