參數(shù)資料
型號: SSM2380CBZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 7/32頁
文件大?。?/td> 0K
描述: IC AMP AUD 2X2W STER D 16WLCSP
產(chǎn)品變化通告: 8mm Carrier Tape Changes 28/Feb/2012
標(biāo)準(zhǔn)包裝: 10,000
類型: D 類
輸出類型: 2 通道(立體聲)
在某負(fù)載時最大輸出功率 x 通道數(shù)量: 3.2W x 2 @ 4 歐姆
電源電壓: 2.5 V ~ 5.5 V
特點: 消除爆音,差分輸入,I²C,靜音,短路和熱保護(hù)
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 16-WLCSP
封裝/外殼: 16-UFBGA,WLCSP
包裝: 帶卷 (TR)
SSM2380
Rev. A | Page 15 of 32
OPERATING MODES
The SSM2380 has three unique operating modes, controlled by
the MODE pin. When MODE (Ball C2) is connected to GND,
the SSM2380 operates in I2C control mode; Ball C3 and Ball C4
function as SCK and SDA for the I2C input. In I2C control mode,
the user has full control of all internal registers of the SSM2380
(see Table 11).
When MODE (Ball C2) is connected to VDD, the SSM2380
operates in gain select mode; Ball C3 and Ball C4 function as
the gain select pins, GAIN0 and GAIN1. All ALC and emission
control features are disabled in gain select mode, and the user
can set the gain to 6 dB, 12 dB, 18 dB, or 24 dB only.
When MODE (Ball C2) is not connected (floating), the SSM2380
operates in ALC mode; Ball C3 and Ball C4 function as EDGE and
ALCTH. In ALC mode, the default gain is 18 dB. The user can
enable or disable the emission control (EMI) feature by connect-
ing EDGE (Ball C3) to VDD or GND. In addition to emission
control, the ALC is activated. The user must connect a resistor
from ALCTH (Ball C4) to GND. This resistor allows the user to
limit the output level to any setting from 45% to 90% of VDD.
Table 6. MODE Pin Selection Guide
SSM2380 Ball
Ball C2 (MODE)
Ball C3
Ball C4
Operating Mode
High (connected to VDD)
GAIN0
GAIN1
Gain select mode
Low (connected to GND)
SCK
SDA
I2C control mode
Open (floating)
EDGE
ALCTH
ALC mode
ALC MODE OPERATION
When MODE is not connected (floating), the SSM2380 is in ALC
mode, disabling the I2C interface. In ALC mode, the user has
control of only two functions: setting the ALC threshold voltage
and activating or deactivating the emission limiting circuitry.
Setting the ALC Threshold Voltage
To set the ALC threshold voltage, connect ALCTH (Ball C4)
to GND with a series resistor. Figure 36 shows the relationship
between the RTH resistor setting and the output voltage limit as
a percentage of the supply rail.
To calculate the resistor value, use the following equations:
Limit (%) = 100 × (REXT + 53)/(2.2 × REXT + 58) kΩ
REXT = (53 58 × Limit/100)/(2.2 × (Limit/100 – 1))%
For example, to set an 80% limit,
REXT = (53 58 × 80/100)/(2.2 × (80/100 1) kΩ
Therefore, 8.7 kΩ is required.
Maximum output power is derived from VTH using the
following equation:
SP
DD
OUT
R
V
Limit
P
2
100
/
)
(
×
=
where RSP is the speaker impedance.
95
90
85
80
75
70
65
60
55
50
45
100
1k
10k
100k
1M
RESISTOR ()
OU
TP
U
T
V
O
L
T
A
G
E
LIMIT
(%
)
08
75
2-
005
TYPICAL CONDITION
INTERNAL RESISTOR – 20%
INTERNAL RESISTOR + 20%
Figure 36. Output Voltage Limit (VTH) vs. RTH
In ALC mode, the attack, hold, and release times associated
with ALC operation are at fixed levels, as indicated in Table 7.
Table 7. Attack, Hold, and Release Times for ALC Mode
Time
Duration
Attack Time
256 μs (per 0.5 dB step)
Hold Time
90 ms to 120 ms (nonadjustable)
Release Time
128 ms (per 0.5 dB step)
Activating or Deactivating the Emission Limiting Circuitry
To activate or deactivate the emission limiting circuitry, connect
EDGE (Ball C3) to GND or to VDD. When EDGE is connected
to GND, the SSM2380 is in normal operating mode, deactivating
the emission limiting function. The device operates with maximum
efficiency and noise level performance in this setting. The user
can also pass FCC Class B emission testing with 10 cm twisted
pair speaker wire for loudspeaker connection.
If longer speaker wire is desired, connect the EDGE pin to VDD
to activate the emission limiting circuitry. The trade-off is slightly
lower efficiency and noise performance. The penalty for using the
emission control circuitry is far less than the decreased perfor-
mance observed when using a ferrite bead based EMI filter for
emission limiting purposes.
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