參數(shù)資料
型號: SSTPAD10-SOT-23
廠商: LINEAR INTEGRATED SYSTEMS INC
元件分類: 二極管(射頻、小信號、開關(guān)、功率)
英文描述: 0.01 A, SILICON, SIGNAL DIODE
封裝: ROHS COMPLIANT, PLASTIC PACKAGE-3
文件頁數(shù): 4/11頁
文件大小: 415K
代理商: SSTPAD10-SOT-23
Figure 1. Operational Amplifier Protection
Input Differential Voltage limited to 0.8V (typ) by JPADs D1 and D2. Common
Mode Input voltage limited by JPADs D3 and D4 to ±15V.
Figure 2. Sample and Hold Circuit
Typical Sample and Hold circuit with clipping. JPAD diodes reduce offset
voltages fed capacitively from the JFET switch gate.
FIGURE 1
FIGURE 2
2N4117A
R
2N4393
-V
+V
V
OUT
D2
D1
C
JPAD5
CONTROL
SIGNAL
e
in
+V
-15V
+15V
OP-27
D1
D2
D3
D4
+
-
JPAD20
1
2
3
SOT-23
DIMENSIONS IN
MILLIMETERS
0.89
1.03
1.78
2.05
1.20
1.40
2.10
2.64
0.37
0.51
2.80
3.04
0.89
1.12
0.013
0.100
0.085
0.180
0.55
12
LS XXX
YYWW
0.170
0.195
0.500
0.610
0.016
0.022
0.095
0.105
0.175
0.195
0.130
0.155
0.045
0.060
0.014
0.020
TO-92
DIMENSIONS
IN INCHES.
TO-72
Three Lead
0.230
0.209
DIA.
0.195
0.175
0.030
MAX.
0.500 MIN.
0.150
0.115
0.019
0.016
DIA.
3 LEADS
1
2
0.046
0.036
45°
0.048
0.028
0.100
0.050
3
Linear Integrated Systems 4042 Clipper Court Fremont, CA 94538 Tel: 510 490-9160 Fax: 510 353-0261
1.
Absolute maximum ratings are limiting values above which serviceability may be impaired.
2.
The PAD type number denotes its maximum reverse current value in pico amperes. Devices with IR values intermediate to those shown
are available upon request.
Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its
use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implicatio
otherwise under any patent or patent rights of Linear Integrated Systems.
n or
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