參數(shù)資料
型號(hào)： ST52440F2
英文描述： MAX 7000 CPLD 64 MC 100-TQFP
中文描述： 8位重癥監(jiān)護(hù)病房與定時(shí)器/脈寬調(diào)制。模擬比較器?？煽毓? PWM定時(shí)器。水分散粒劑。提供了8K存儲(chǔ)器
文件頁(yè)數(shù)： 8/88頁(yè)
文件大小： 1162K
代理商： ST52440F2
ST52T430/E430
The ST52x430 core uses flags that correspond to
the actual mode. As soon as an interrupt is
generated the ST52x430 core uses the interrupt
flags instead of the normal flags.
Each interrupt level has its own set of flags, which
is saved in the STACK together with the Program
Counter. These flags are restored from the STACK
automatically when a RETI instruction is executed.
If the MCU was in normal mode before an interrupt,
the normal flags are restored when the RETI
instruction is executed.
Note:
A CALL subroutine is a normal mode
execution. For this reason, a RET instruction,
consequent to a CALL instruction does not affect
the normal mode set of flags.
Flags are not cleared during context switching and
remain in the state they were at the end of the last
interrupt routine switching.
The Carry flag is set when an overflow occurs
during arithmetic operations, otherwise it
is
cleared.
The Sign flag is set when an underflow occurs
during
arithmetic
operations,
otherwise
it is
cleared.
2.3 Address Spaces
ST52x430 has four separate address spaces:
s
RAM: 256 Bytes
Figure 2.3 Address Spaces Description
s
Input Registers: 20 8-bit registers
s
Output Registers 10 8-bit registers
s
Configuration Registers: 21 8-bit registers
s
Program memory up to 8K Bytes
Program memory will be described in further
details in the MEMORY section
2.3.1 RAM and STACK.
RAM memory consists of 256 general purpose 8-
bit RAM registers.
All the registers in RAM can be specified by using
a decimal address. For example, 0 identifies the
first register of RAM.
To read or write RAM registers LOAD instructions
must be used. See Table 2.5
Each interrupt level has its own set of flags, which
is saved in the STACK together with the Program
Counter. These flags are restored from the STACK
automatically when a RETI instruction is executed.
When the instructions like Interrupt request or
CALL are executed, a STACK level is used to push
the PC.
The STACK is located in RAM. For each level of
stack, 2 bytes of RAM are used. The values of this
stack are stored from the last RAM register
(address 255). The maximum level of stack
must be less than 128.
ST52X430 CORE
PROGRAM MEMORY
RAM
CONTROL UNIT
DPU
ALU
ON CHIP PERIPHERALS
PERIPHERAL REGISTERS
CONFIGURATION
REGISTERS
INPUT REGISTERS
LDRI
LDCR
LDPR
LDRC
LDCE
PERIPHERAL
BLOCK
相關(guān)PDF資料
PDF描述
ST52440F3 MAX 7000 CPLD 64 MC 44-TQFP
ST52440G2 MAX 7000 CPLD 64 MC 44-TQFP
ST52440G3 MAX 7000 CPLD 64 MC 44-TQFP
ST52501LF1 MAX 7000 CPLD 128 MC 84-PLCC
ST52501LF2 MAX 7000 CPLD 128 MC 100-TQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST52440F3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH TIMER/PWM. ANALOG COMPARATOR. TRIAC/PWM TIMER. WDG. UP TO 8K EPROM
ST52440G2 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH TIMER/PWM. ANALOG COMPARATOR. TRIAC/PWM TIMER. WDG. UP TO 8K EPROM
ST52440G3 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT ICU WITH TIMER/PWM. ANALOG COMPARATOR. TRIAC/PWM TIMER. WDG. UP TO 8K EPROM
ST5-24B19 功能描述:電源變壓器 SPLIT BOBBIN HORZ MOUNT XFMR RoHS:否 制造商:Triad Magnetics 功率額定值:12 VA 初級(jí)電壓額定值:115 V / 230 V 次級(jí)電壓額定值:12 V / 24 V 安裝風(fēng)格:SMD/SMT 一次繞組:Dual Primary Winding 二次繞組:Dual Secondary Winding 長(zhǎng)度:2.5 in 寬度:2 in 高度:1.062 in
ST525 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TRANSISTOR | BJT | NPN | 200V V(BR)CEO | 5A I(C) | TO-3
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