參數(shù)資料
型號: ST6218C
英文描述: 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. A/D CONVERTER. 8-BIT AUTO-RELOAD TIMER. UART. OSG. SAFE RESET AND 20 PINS
中文描述: 8位微控制器(MCU)的與檢察官辦公室。光盤。 FASTROM。的A / D轉(zhuǎn)換器。 8位自動重加載定時器。 UART的。業(yè)務(wù)支助。安全復(fù)位和20圖釘
文件頁數(shù): 21/82頁
文件大小: 870K
代理商: ST6218C
21/82
ST62T18C/E18C
RESETS
(Cont’d)
3.2.3 Watchdog Reset
The MCU provides a Watchdog timer function in
order to ensure graceful recovery from software
upsets. If the Watchdog register is not refreshed
before an end-of-count condition is reached, the
internal reset will be activated. This, amongst oth-
er things, resets the watchdog counter.
The MCU restarts just as though the Reset had
been generated by the RESET pin, including the
built-in stabilisation delay period.
3.2.4 LVD Reset
The on-chip Low Voltage Detector, selectable as
user option, features static Reset when supply
voltage is below a reference value. Thanks to this
feature, external reset circuit can be removed
while keeping the application safety. This SAFE
RESET is effective as well in Power-on phase as
in power supply drop with different reference val-
ues, allowing hysteresis effect. Reference value in
case of voltage drop has been set lower than the
reference value for power-on in order to avoid any
parasitic Reset when MCU start's running and
sinking current on the supply.
As long as the supply voltage is below the refer-
ence value, there is a internal and static RESET
command. The MCU can start only when the sup-
ply voltage rises over the reference value. There-
fore, only two operating mode exist for the MCU:
RESET active below the voltage reference, and
running mode over the voltage reference as
shown on the
Figure 14
, that represents a power-
up, power-down sequence.
Note
: When the RESET state is controlled by one
of the internal RESET sources (Low Voltage De-
tector, Watchdog, Power on Reset), the RESET
pin is tied to low logic level.
Figure 14. LVD Reset on Power-on and Power-down (Brown-out)
3.2.5 Application Notes
No external resistor is required between V
DD
and
the Reset pin, thanks to the built-in pull-up device.
Direct external connection of the pin RESET to
V
DD
must be avoided in order to ensure safe be-
haviour of the internal reset sources (AND.Wired
structure).
RESET
RESET
VR02106A
time
V
Up
V
dn
V
DD
21
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