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參數(shù)資料
| 型號： | ST62E60CF1 |
| 英文描述： | 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. EPROM. A/D CONVERTER. SAFE RESET. AUTO-RELOAD TIMER. EEPROM AND SPI |
| 中文描述： | 8位微控制器（MCU）的與檢察官辦公室。光盤。 FASTROM。存儲器。的A / D轉(zhuǎn)換器。安全復(fù)位。自動重加載定時器。的EEPROM和SPI |
| 文件頁數(shù)： | 22/84頁 |
| 文件大?。?/td> | 918K |
| 代理商： | ST62E60CF1 |
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ST62T53C/T60C/T63C ST62E60C
CLOCK SYSTEM
(Cont’d)
Figure 12. Clock Circuit Block Diagram
Figure 13. Maximum Operating Frequency (f
MAX
) versus Supply Voltage (V
DD
)
Notes
:
1. In this area, operation is guaranteed at the
quartz crystal frequency.
2. When the OSG is disabled, operation in this
area is guaranteed at the crystal frequency. When
the OSG is enabled, operation in this area is guar-
anteed at a frequency of at least f
OSG Min.
3. When the OSG is disabled, operation in this
area is guaranteed at the quartz crystal frequency.
When the OSG is enabled, access to this area is
prevented. The internal frequency is kept a f
OSG.
4. When the OSG is disabled, operation in this
area is not guaranteed
When the OSG is enabled, access to this area is
prevented. The internal frequency is kept at f
OSG.
MAIN
OSCILLATOR
OSG
LFAO
M
U
X
Core
: 13
: 12
: 1
TIMER 1
Watchdog
POR
f
INT
Main Oscillator off
OSCILLATOR
DIVIDER
RS0,RS1
1
2.5
3.6
4
4.5
5
5.5
6
8
7
6
5
4
3
2
Maximum FREQUENCY (MHz)
SUPPLY VOLTAGE (V
DD
)
F
3
4
3
2
1
f
OSG
f
OSG
Min (at 85°C)
G
I
VR01807J
f
OSG
Min (at 125°C)
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