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| 型號(hào)： | ST62E85BG1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, UVPROM, 8 MHz, MICROCONTROLLER, CQFP80 |
| 封裝： | CERAMIC, QFP-80 |
| 文件頁(yè)數(shù)： | 58/78頁(yè) |
| 文件大?。?/td> | 868K |
| 代理商： | ST62E85BG1 |
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61/78
ST62T85B/E85B
5.3 INSTRUCTION SET
The ST6 core offers a set of 40 basic instructions
which, when combined with nine addressing
modes, yield 244 usable opcodes. They can be di-
vided into six different types: load/store, arithme-
tic/logic, conditional branch, control instructions,
jump/call, and bit manipulation. The following par-
agraphs describe the different types.
All the instructions belonging to a given type are
presented in individual tables.
Load & Store. These instructions use one, two or
three bytes in relation with the addressing mode.
One operand is the Accumulator for LOAD and the
other operand is obtained from data memory using
one of the addressing modes.
For Load Immediate one operand can be any of
the 256 data space bytes while the other is always
immediate data.
Table 24. Load & Store Instructions
Notes:
X,Y. Indirect Register Pointers, V & W Short Direct Registers
# .
Immediate data (stored in ROM memory)
rr.
Data space register
. Affected
* .
Not Affected
Instruction
Addressing Mode
Bytes
Cycles
Flags
ZC
LD A, X
Short Direct
1
4
*
LD A, Y
Short Direct
1
4
*
LD A, V
Short Direct
1
4
*
LD A, W
Short Direct
1
4
*
LD X, A
Short Direct
1
4
*
LD Y, A
Short Direct
1
4
*
LD V, A
Short Direct
1
4
*
LD W, A
Short Direct
1
4
*
LD A, rr
Direct
2
4
*
LD rr, A
Direct
2
4
*
LD A, (X)
Indirect
1
4
*
LD A, (Y)
Indirect
1
4
*
LD (X), A
Indirect
1
4
*
LD (Y), A
Indirect
1
4
*
LDI A, #N
Immediate
2
4
*
LDI rr, #N
Immediate
3
4
*
61
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