Obsolete
Product(s)
- Obsolete
Product(s)
51/82
ST6388, ST63E88, ST63T88
ON-SCREEN DISPLAY (Cont’d)
Display Character Register (Ch)
See Data RAM Table Description for Specific Ad-
dress —
Read/Write
C7-C6. This bits must be different from “11”.
C7-C0. Character code. The 8 bits character code
(range: 00h to 0BFh) selects the character from a
set of 192 characters available.
Space Character Format Register (Ch)
See Data RAM Table Description for Specific Ad-
dress —
Read/Write
D7-D6. This bits must be “11”.
R, G, B. Colour. The 3 colour control bits define
the foreground colour of the following word as
shown in table below.
Table 17. Space Character Register Colour
Setting.
BGS. Background Select. The background select
bit selects the desired background for the following
word. There are two possible backgrounds defined
by the bits in the Background Control Register.
“0” The background on the following word is ena-
bled by BG0 and the colour is set by R0, G0,
and B0.
“1” The background on the following word is ena-
bled by BG1 and the colour is set by R1, G1,
and B1.
WE. Word Enable. The word enable bit defines
whether or not the following word is displayed.
“0” The word is not displayed.
“1” If the global enable bit and the OSD ram ena-
ble bit are set, then the word is displayed.
HSE. Horizontal Space Enable. The horizontal
space enable bit determines the spacing between
words.
“0” The space between words is equal to the width
of the space character, which is 14 dots.
“1” The space between words is defined by the
value in the horizontal space register plus the
width of the space character.
Character Set
The character set is user defined as ROM mask
option.
Register and RAM Addressing
The OSD contains eight registers and 168 RAM lo-
cations. The eight registers are the Vertical Start
Address register, Horizontal Start Address regis-
ter, Vertical Space registers (VSR0 and VSR1),
Horizontal Space register, Background Control
register, Global Enable register and Polarity Select
register (PSR). The Global Enable register and
Polarity Select register can be written at any time
by the ST6 Core. The access to the next five reg-
isters and the RAM is controlled through the state
of the Global Enable register.
The first six registers and the RAM are located in
page 5 of the paged memory of the ST6388 MCU.
This page contains 64 memory locations. This
paged memory is mapped into the memory loca-
tions 00h to 3Fh of the ST6388 memory map. A
page of memory is enabled by setting the desired
page bit, located in the Data Ram Bank Register,
to a one. The page register is at location E8h. The
hexadecimal value 20h selects page 5 - the OSD
RAM and registers (except PSR). As the OSD
RAM consists of 168 words, this RAM is further
paged using two bits (LS1/LS0) in the Global Ena-
ble register, in order to fit onto the 64 locations of
the page 5 of the MCU RAM space. Table 18
shows the addresses of the OSD registers and
RAM.
70
C7
C6
C5
C4
C3
C2
C1
C0
70
D7
D6
R
G
B
BGS
WE
HSE
R
G
B
Colour
0
Black
0
1
Blue
0
1
0
Green
0
1
Cyan
1
0
Red
1
0
1
Magenta
1
0
Yellow
1
White