參數(shù)資料
型號: ST72321BR7T3
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, QFP64
封裝: 14 X 14 MM, ROHS COMPLIANT, LQFP-64
文件頁數(shù): 96/187頁
文件大?。?/td> 3071K
代理商: ST72321BR7T3
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁當(dāng)前第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁
ST72321BRx, ST72321BARx ST72321BJx, ST72321BKx
185/187
KNOWN LIMITATIONS (Cont’d)
15.1.4 SCI Wrong Break duration
Description
A single break character is sent by setting and re-
setting the SBK bit in the SCICR2 register. In
some cases, the break character may have a long-
er duration than expected:
- 20 bits instead of 10 bits if M=0
- 22 bits instead of 11 bits if M=1.
In the same way, as long as the SBK bit is set,
break characters are sent to the TDO pin. This
may lead to generate one break more than expect-
ed.
Occurrence
The occurrence of the problem is random and pro-
portional to the baudrate. With a transmit frequen-
cy
of
19200
baud
(fCPU=8MHz and SCI-
BRR=0xC9), the wrong break duration occurrence
is around 1%.
Workaround
If this wrong duration is not compliant with the
communication protocol in the application, soft-
ware can request that an Idle line be generated
before the break character. In this case, the break
duration is always correct assuming the applica-
tion is not doing anything between the idle and the
break. This can be ensured by temporarily disa-
bling interrupts.
The exact sequence is:
- Disable interrupts
- Reset and Set TE (IDLE request)
- Set and Reset SBK (Break Request)
- Re-enable interrupts
15.1.5 16-bit Timer PWM Mode
In PWM mode, the first PWM pulse is missed after
writing the value FFFCh in the OC1R register
(OC1HR, OC1LR). It leads to either full or no PWM
during a period, depending on the OLVL1 and
OLVL2 settings.
15.1.6
TIMD
set
simultaneously
with
OC
interrupt
If the 16-bit timer is disabled at the same time the
output compare event occurs then output compare
flag gets locked and cannot be cleared before the
timer is enabled again.
Impact on the application
If output compare interrupt is enabled, then the
output compare flag cannot be cleared in the timer
interrupt routine. Consequently the interrupt serv-
ice routine is called repeatedly.
Workaround
Disable the timer interrupt before disabling the tim-
er. Again while enabling, first enable the timer then
the timer interrupts.
Perform the following to disable the timer:
TACR1 or TBCR1 = 0x00h; // Disable the com-
pare interrupt
TACSR | or TBCSR | = 0x40; // Disable the timer
Perform the following to enable the timer again:
TACSR & or TBCSR &= ~0x40; // Enable the tim-
er
TACR1 or TBCR1 = 0x40; // Enable the compare
interrupt
15.1.7 I2C Multimaster
In multimaster configurations, if the ST7 I2C re-
ceives a START condition from another I2C mas-
ter after the START bit is set in the I2CCR register
and before the START condition is generated by
the ST7 I2C, it may ignore the START condition
from the other I2C master. In this case, the ST7
master will receive a NACK from the other device.
On reception of the NACK, ST7 can send a re-start
and Slave address to re-initiate communication
15.1.8 Pull-up always active on PE2
The I/O port internal pull-up is always active on I/O
port E2. As a result, if PE2 is in output mode low
level, current consumption in Halt/Active Halt
mode is increased.
15.1.9 ADC accuracy 32K Flash devices
The ADC accuracy in 32K Flash Devices deviates
from table in section 12.12.3 on page 169 as fol-
lows:
Symbol
Max
Unit
|ET|
6
LSB
|EO|
5
|EG|
4.5
|ED|
2
|EL|
3
相關(guān)PDF資料
PDF描述
ST72321M9T3/XXX 8-BIT, MROM, MICROCONTROLLER, PQFP80
ST72321M7T5/XXX 8-BIT, MROM, MICROCONTROLLER, PQFP80
ST72321M7T7/XXX 8-BIT, MROM, MICROCONTROLLER, PQFP80
ST72321AR7T3/XXX 8-BIT, MROM, MICROCONTROLLER, PQFP64
ST72324BLK4BA/XXX 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDIP32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST72321BR9-AUTO 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-bit MCU for automotive with 32 to 60 Kbyte Flash/ROM, ADC, 5 timers, SPI, SCI, I2C interface
ST72321BXXX-AUTO 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-bit MCU for automotive with 32 to 60 Kbyte Flash/ROM, ADC, 5 timers, SPI, SCI, I2C interface
ST72321J 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 5 TIMERS, SPI, SCI, I2C INTERFACE
ST72321J7 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64/44-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC,FIVE TIMERS, SPI, SCI, I2C INTERFACE
ST72321J7T1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64/44-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC,FIVE TIMERS, SPI, SCI, I2C INTERFACE