參數(shù)資料
型號: ST72F60E1M1
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO24
封裝: 0.300 INCH, LEAD FREE, PLASTIC, SOP-24
文件頁數(shù): 37/139頁
文件大?。?/td> 1993K
代理商: ST72F60E1M1
ST7260xx
Device configuration and ordering information
131/139
18
Device configuration and ordering information
Each device is available for production in user programmable versions (High Density
FLASH) as well as in factory coded versions (FASTROM).
ST72P60 devices are Factory Advanced Service Technique ROM (FASTROM) versions:
they are factory programmed FLASH devices.
ST72F60 FLASH devices are shipped to customers with a default content (FFh).
This implies that FLASH devices have to be configured by the customer using the Option
Byte while the FASTROM devices are factory-configured.
18.1
Option byte
The Option Byte allows the hardware configuration of the microcontroller to be selected.
The Option Byte has no address in the memory map and can be accessed only in
programming mode using a standard ST7 programming tool. The default contents of the
FLASH is fixed to F7h. This means that all the options have “1” as their default value, except
LVD.
OPT 7:6 = Reserved.
OPT 5 = WDGSW Hardware or Software Watchdog
This option bit selects the watchdog type.
0: Hardware enabled
1: Software enabled
OPT 4 = WDHALT Watchdog and HALT mode
This option bit determines if a RESET is generated when entering HALT mode while the
Watchdog is active.
0: No Reset generation when entering Halt mode
1: Reset generation when entering Halt mode
OPT 3 = LVD Low Voltage Detector selection
This option bit selects the LVD.
0: LVD enabled
1: LVD disabled
OPT 2 = Reserved.
OPT 1 = OSC24/12 Oscillator Selection
This option bit selects the clock divider used to drive the USB interface at 6 MHz.
0: 24 MHz oscillator
1: 12 Mhz oscillator
OPT 0 = FMP_R Flash memory readout protection
This option indicates if the user flash memory is protected against readout. readout
protection, when selected, provides a protection against Program Memory content
Table 77.
Flash option byte
7
0
--
WDG SW
WD HALT
LVD
--
OSC 24/12
FMP_R
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