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參數資料
| 型號： | ST7FLU05MAE |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO8 |
| 封裝： | 0.150 INCH, LEAD FREE, PLASTIC, SOP-8 |
| 文件頁數： | 56/124頁 |
| 文件大小： | 2186K |
| 代理商： | ST7FLU05MAE |
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Obsolete
Product(s)
- Obsolete
Product(s)
ST7LUS5, ST7LU05, ST7LU09
Interrupts
37/124
7
Interrupts
The ST7 core may be interrupted by one of two different methods: Maskable hardware
interrupts as listed in Table 15: Interrupt mapping on page 46 and a non-maskable software
interrupt (TRAP). The interrupt processing flowchart is shown in Figure 18.
The maskable interrupts must be enabled by clearing the I bit in order to be serviced.
However, disabled interrupts may be latched and processed when they are enabled (see
Section 7.2: External interrupts).
Note:
After reset, all interrupts are disabled.
When an interrupt has to be serviced:
●
Normal processing is suspended at the end of the current instruction execution.
●
The PC, X, A and CC registers are saved onto the stack.
●
The I bit of the CC register is set to prevent additional interrupts.
●
The PC is then loaded with the interrupt vector of the interrupt to service and the first
instruction of the interrupt service routine is fetched (refer to Table 15: Interrupt
mapping for vector addresses).
The interrupt service routine should finish with the IRET instruction which causes the
contents of the saved registers to be recovered from the stack.
Note:
As a consequence of the IRET instruction, the I bit is cleared and the main program
resumes.
Priority management
By default, a servicing interrupt cannot be interrupted because the I bit is set by hardware
entering in interrupt routine.
In the case when several interrupts are simultaneously pending, a hardware priority defines
which one will be serviced first (see Table 15: Interrupt mapping).
Interrupts and low power mode
All interrupts allow the processor to leave the Wait low power mode. Only external and
specifically mentioned interrupts allow the processor to leave the Halt low power mode (refer
to the “Exit from HALT” column in Table 15: Interrupt mapping).
7.1
Non-maskable software interrupt
This interrupt is entered when the TRAP instruction is executed regardless of the state of
the I bit. It is serviced according to the flowchart in Figure 18.
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相關代理商/技術參數 |
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| ST7FLU09MCE | 制造商:STMicroelectronics 功能描述: |
| ST7FMC1K2B3 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:8-bit MCU with nested interrupts, Flash, 10-bit ADC, brushless motor control, five timers, SPI, LINSCI? |
| ST7FMC1K2B6 | 功能描述:8位微控制器 -MCU 8 BITS MICROCONTR RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| ST7FMC1K2T3 | 功能描述:8位微控制器 -MCU ST7MC1/ST7MC2 8B MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| ST7FMC1K2T6 | 功能描述:8位微控制器 -MCU 8K Flash 384 RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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