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參數(shù)資料
| 型號： | ST95022 |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 2 Kbit Serial SPI EEPROM with High Speed Clock |
| 中文描述： | 2千位的SPI EEPROM，帶有高速時鐘 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 113K |
| 代理商： | ST95022 |
OPERATIONS
All instructions, addresses and data are shifted in
and out of the chip MSB first. Data input (D) is
sampled on the first rising edge of clock (C) after
the chip select (S) goes low. Prior to any operation,
a one-byte instruction code must be entered in the
chip. This code is entered via the data input (D),
and latched on the rising edge of the clock input
(C). To enter an instruction code, the product must
have been previously selected (S = low). Table 3
shows the instruction set and format for device
operation. If an invalid instruction is sent (one not
contained in Table 3), the chip is automatically
deselected.
Write Enable (WREN) and Write Disable (WRDI)
The ST95022 contains a write enable latch. This
latch must be set prior to every WRITE or WRSR
operation. The WREN instruction will set the latch
and the WRDI instruction will reset the latch. The
latch is reset under the following conditions:
– W pin is low
– Power on
– WRDI instruction executed
– WRSR instruction executed
– WRITE instruction executed
As soon as the WREN or WRDI instruction is
received by the ST95022, the circuit executes the
instruction and enters a wait mode until it is dese-
lected.
Read Status Register (RDSR)
The RDSR instruction provides access to the status
register. The status register may be read at any
time, even during a write to the memory operation.
As soon as the 8th bit of the status register is read
out, the ST95022 enters a wait mode (data on D is
not decoded, Q is in Hi-Z) until it is deselected.
The status register format is as follows:
b7
b0
1
1
1
1
BP1
BP0
WEL
WIP
BP1, BP0: Read and write bits.
WEL, WIP: Read only bits.
b7 to b4: Read only bits.
During a write to the memory operation to the
memory array, all bits BP1, BP0, WEL, WIP are
valid and can be read. During a write to the status
register, only the bits WEL and WIP are valid and
can be read. The values of BP1 and BP0 read at
that time correspond to the previous contents of the
status register.
The Write-In-Process (WIP) read-only bit indicates
whether the ST95022 is busy with a write opera-
tion. When set to a ’1’ a write is in progress, when
set to a ’0’ no write is in progress.
The Write Enable Latch (WEL) read-only bit indi-
cates the status of the write enable latch. When set
to a ’1’ the latch is set, when set to a ’0’ the latch is
reset. The Block Protect (BP0 and BP1) bits indi-
cate the extent of the protection employed. These
bits are set by the user issuing the WRSR instruc-
tion. These bits are non-volatile.
Write Status Register (WRSR)
The WRSR instruction allows the user to select the
size of protected memory. The ST95022 is divided
into four 512 bit blocks. The user may read the
blocks but will be unable to write within the pro-
Instruction
Description
Instruction Format
WREN
Set Write Enable Latch
0000 0110
WRDI
Reset Write Enable Latch
0000 0100
RDSR
Read Status Register
0000 0101
WRSR
Write Status Register
0000 0001
READ
Read Data from Memory Array
0000 0011
WRITE
Write Data to Memory Array
0000 0010
Notes:
A = 1, Upper page selected
A = 0, Lower page selected
Table 3. Instruction Set
4/16
ST95022
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| ST950-30L2KI | 功能描述:CAP TANT 950UF 30V 10% AXIAL RoHS:否 類別:電容器 >> 鉭 系列:SuperTan® ST 標(biāo)準(zhǔn)包裝:1,000 系列:TANTAMOUNT® 695D 電容:3.3µF 電壓 - 額定:50V 容差:±20% ESR（等效串聯(lián)電阻）:3.2 歐姆 類型:保形涂層 工作溫度:-55°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:2414（6034 公制） 尺寸/尺寸:0.236" L x 0.135" W（6.00mm x 3.43mm） 高度 - 座高（最大）:0.085"（2.16mm） 引線間隔:- 制造商尺寸代碼:F 特點:通用 包裝:帶卷 (TR) 壽命@溫度:- |
| ST950-30L2MI | 功能描述:鉭質(zhì)電容器-濕式 950UF 30V 20% L2 RoHS:否 制造商:Vishay/Tansitor 電容:2800 uF 電壓額定值:35 V ESR:0.35 Ohms 容差:20 % 端接類型:Axial 工作溫度范圍:- 55 C to + 85 C 制造商庫存號:T4 Case 外殼直徑:9.52 mm 外殼長度:26.97 mm 外殼寬度: 外殼高度: 系列:STE 產(chǎn)品:Tantalum Wet Hermetically Sealed 封裝:Bulk |
| ST95040 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4K/2K/1K Serial SPI EEPROM with Positive Clock Strobe |
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