參數(shù)資料
型號: STD95NH02L
廠商: 意法半導體
英文描述: N-CHANNEL 24V - 0.0039ohm - 80A DPAK ULTRA LOW GATE CHARGE STripFET MOSFET
中文描述: N溝道24V的- 0.0039ohm - 80A條的DPAK超低MOSFET的柵極電荷STripFET
文件頁數(shù): 9/11頁
文件大?。?/td> 319K
代理商: STD95NH02L
9/11
STD95NH02L
HighSideSwitch(SW1)
LowSideSwitch(SW2)
conduction
P
δ
*
I
R
2
L
DS(on)SW1
)
1
L
I
R
2
DS(on)SW2
δ
switching
P
g
L
I
I
*
f
Q
(Q
*
V
gd(SW1)
gsth(SW1)
in
+
ZeroVoltageSwitching
Recovery
NotApplicable
1
f
Q
*
V
rr(SW2)
in
diode
P
Conduction
NotApplicable
f
t
L
I
V
deadtime
f(SW2)
)
gate(Q
G
P
f
gg
V
*
Q
g(SW1)
f
V
*
Q
gg
gls(SW2)
Qoss
P
2
f
Q
*
V
oss(SW1)
in
2
f
Q
*
V
oss(SW2)
in
Appendix A: Buck Converter Power Losses Estimation
DESCRIPTION
The power losses associated with the FETs in a
Synchronous Buck converter can be estimated us-
ing the equations shown in the table below. The for-
mulas give a good approximation, for the sake of
performance comparison, of how different pairs of
devices affect the converter efficiency. However a
very important parameter, the working temperature,
is not considered. The real device behavior is really
dependent on how the heat generated insidethe de-
vices is removed to allow for a safer working junc-
tion temperature.
The low side (SW2) device requires:
- Very low RDS(on) to reduce conduction losses
- Small Q
gls
to reduce the gate charge losses
- Small C
oss
to reduce losses due to output
capaci tance
- Small Q
rr
to reduce losses on SW1 during its
turn-on
- The C
gd
/C
gs
ratio lower than V
th
/V
GG
ratio
especially with low drain to source voltage
to avoid the cross conduction phenomenon
The high side (SW1) device requires:
- Small R
g
and L
s
to allow higher gate current
peak and to limit the voltage feedback on the gate
- Small Q
g
to have a faster commutation and
to reduce gate charge losses
- Low R
DS(on)
to reduce the conduction losses
Parameter
δ
Q
gsth
Q
gls
Pconduction
Pswitching
Pdiode
Pdiode
P
Qoss
Meaning
Duty-Cycle
Post Threshold Gate Charge
Third Quadrant Gate Charge
On State Losses
On-off Transition Losses
Conduction and Reverse Recovery Diode Losses
Gate Drive Losses
Output Capacitance Losses
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