參數(shù)資料
型號(hào)： STR710RZT6
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 66 MHz, RISC MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 0.50 MM PITCH, LQFP-144
文件頁(yè)數(shù)： 18/77頁(yè)
文件大?。?/td> 1919K
代理商： STR710RZT6
STR71xF
System architecture
25/77
20 G2
P0.15/
WAKEUP
ITT XX
Port 0.15 Wakeup from Standby mode input.
Note: This port is input only.
21 G3 RTCXTI
Realtime Clock input and input of 32 kHz oscillator
amplifier circuit
22 H4 RTCXTO
Output of 32 kHz oscillator amplifier circuit
23
F3 STDBY
I/O
CT
4mA
X
Input: Hardware Standby mode entry input active
low.
Caution: External pull-up to V33 required to select
normal mode.
Output: Standby mode active low output following
Software Standby mode entry.
Note: In Standby mode all pins are in high
impedance except those marked Active in Stdby.
24 G4 RSTIN
ICT
X
Reset input
25 H5 VSSBKP
S
X
Stabilization for low power voltage regulator.
26
F4 V18BKP
SX
Stabilization for low power voltage regulator.
Requires external capacitors of at least 1F
between V18BKP and VSS18BKP. See Figure 5.
Note: If the low power voltage regulator is
bypassed, this pin can be connected to an external
1.8V supply.
27 G5 V18
S
Stabilization for main voltage regulator. Requires
external capacitors of at least 10F + 33nF
between V18 and VSS18. See Figure 5.
28 H6 VSS18
S
Stabilization for main voltage regulator.
29
E4 VDDA
S
Supply voltage for A/D Converter
30 G6 VSSA
S
Ground voltage for A/D Converter
31
F5
P1.0/T3.OCM
PB/AIN.0
I/O
pu
CT
4mA
X
Port 1.0
Timer 3: Output
Compare B
ADC: Analog input 0
32 H7
P1.1/T3.ICAP
A/T3.EXTCLK
/AIN.1
I/O
pu
CT
4mA
X
Port 1.1
Timer 3: Input
Capture A or
External Clock
input
ADC: Analog input 1
33 H8
P1.2/T3.OCM
PA/AIN.2
I/O
pu
CT
4mA
X
Port 1.2
Timer 3: Output
Compare A
ADC: Analog input 2
34 G8
P1.3/T3.ICAP
B/AIN.3
I/O
pu
CT
4mA
X
Port 1.3
Timer 3: Input
Capture B
ADC: Analog input 3
35
F8
P1.4/T1.ICAP
A/T1.EXTCLK
I/O
pu
CT
4mA
X
Port 1.4
Timer 1: Input
Capture A
Timer 1: External
Clock input
Table 6.
STR711/STR712/STR715 pin description
Pin n°
Pin Name
Ty
p
e
Re
set
Sta
te
1)
Input
Output
Active
in
Stdb
y
Main
function
(after
reset)
Alternate function
LQ
FP64
BGA6
4
I
npu
tL
e
vel
inte
rrupt
Ca
pa
bi
li
ty
OD
PP
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