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參數(shù)資料
| 型號(hào)： | SX18ACSO |
| 英文描述： | IC-SM-8 BIT MCU |
| 中文描述： | 集成電路的Sm - 8位微控制器 |
| 文件頁數(shù)： | 3/42頁 |
| 文件大?。?/td> | 312K |
| 代理商： | SX18ACSO |
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1999 Scenix Semiconductor, Inc. All rights reserved.
- 3 -
www.scenix.com
SX18AC / SX20AC / SX28AC
1.2 Key Features
(Continued)
Analog comparator
Brown-out detector (on/off, programmable trip level)
Multi-Input Wakeup (MIWU) on eight pins
Fast lookup capability through run-time readable code
Complete development tool support available through
Parallax
1.2.1 CPU Features
Fully static design – DC to 50 MHz operation
20 ns instruction cycle time
Mostly single-cycle instructions
Selectable 8-level deep hardware subroutine stack
Single-level interrupt stack
Fixed interrupt response time: 60 ns int., 100 ns ext. at
50 MHz (Turbo Mode)
Hardware context save/restore for interrupt
Designed to be pin-compatible and upward code-com-
pitable with the PIC16C5x
1.2.2 I/O Features
Software-selectable I/O configuration
– Each pin programmable as an input or output
– TTL or CMOS level selection on inputs
– Internal weak pull-up selection on inputs
Schmitt trigger inputs on Port B and Port C
All outputs capable of sinking/sourcing 30 mA
Symmetrical drive on Port A outputs (same V
drop
+/-)
1.3
Architecture
The SX devices use a modified Harvard architecture.
This architecture uses two separate memories with sepa-
rate address buses, one for the program and one for
data, while allowing transfer of data from program mem-
ory to SRAM. This ability allows accessing data tables
from program memory. The advantage of this architec-
ture is that instruction fetch and memory transfers can be
overlapped with a multi-stage pipeline, which means the
next instruction can be fetched from program memory
while the current instruction is being executed using data
from the data memory.
The SX family implements a four-stage pipeline (fetch,
decode, execute, and write back), which results in execu-
tion of one instruction per clock cycle. At the maximum
operating frequency of 50 MHz, instructions are executed
at the rate of one per 20-ns clock cycle.
1.4
The SX devices are currently supported by for third party
tool vendors. The tools provide an integrated develop-
ment environment including editor, macro assembler,
debugger, and programmer.
1.5
Applications
Emerging applications and advances in existing ones
require higher performance while maintaining low cost
and fast time-to-market.
The SX devices provide solutions for many familiar appli-
cations such as process controllers, electronic appli-
ances/tools, security/monitoring systems, and personal
communication devices. In addition, the enhanced
throughput allows efficient development of software mod-
ules called Virtual Peripheral
TM
modules to replace on-
chip hardware peripherals. The concept of Virtual Periph-
eral
TM
provides benefits such as using a more simple
device, reduced component count, fast time to market,
increased flexibility in design, and ultimately overall sys-
tem cost reduction.
Some examples of Virtual Peripheral
TM
modules are:
Serial/ Parallel interfaces such as I
2
C, Microwire,
SPI, DMX-512, X-10, and IR transceivers
Frequency generation and measurement
Spectrum analysis
Multi-tasking, interrupts, and networking
Resonance loops
DRAM drivers
Music and voice synthesis
PPM/PWM output
Delta/Sigma ADC
DTMF I/O and call progress
300/1200 baud modem
Quadrature encoder/decoder
Proportional Integral Derivative (PID) and servo control
Video controller
Programming and Debugging Support
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SX20AC100SO | IC-SM-8-BIT MCU |
| SXA-1 | Amplifier. Other |
| SXA-2 | Amplifier. Other |
| SXA-3 | Amplifier. Other |
| SXA10-48S05 | DC to DC Converter |
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