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參數(shù)資料
| 型號： | SX8723E083TRT |
| 廠商： | Semtech |
| 文件頁數(shù)： | 15/53頁 |
| 文件大小： | 0K |
| 描述： | IC DAS PRESSURE/TEMP SENS 12MLPD |
| 標準包裝： | 1 |
| 系列： | ZoomingADC™ |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS） |
| 輸入類型： | 差分 |
| 輸出類型： | 數(shù)字 |
| 接口： | I²C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 12-BFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 12-MLPD |
| 包裝： | 標準包裝 |
| 其它名稱： | SX8723E083DKR |
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ADVANCED COMMUNICATIONS & SENSING
V1.8 2009 Semtech Corp.
www.semtech.com
22
SX8723
ZoomingADC for Pressure and Temperature Sensing
ADC Characteristics
The main performance characteristics of the ADC (resolution, conversion time, etc.) are determined by three
programmable parameters. The setting of these parameters and the resulting performances are described later.
Over-sampling frequency fs
Over-Sampling Ratio OSR
Number of Elementary Conversions NELCONV
Conversion Sequence
A conversion is started each time the bit START or the bit DEF is set. As depicted in Figure 11, a complete
analog-to-digital conversion sequence is made of a set of NELCONV elementary incremental conversions and a
final quantization step. Each elementary conversion is made of (OSR+1) over-sampling periods Ts=1/fs, i.e.:
(
)
fs
OSR
T
ELCONV
1
+
=
(s)
Equation 12
The result is the mean of the elementary conversion results. An important feature is that the elementary
conversions are alternatively performed with the offset of the internal amplifiers contributing in one direction and
the other to the output code. Thus, converter internal offset is eliminated if at least two elementary sequences
are performed (i.e. if NELCONV
≥ 2). A few additional clock cycles are also required to initiate and end the
conversion properly.
Figure 11 - Analog-to-Digital Conversion Sequence
Note:
The internal bandgap reference state may be forced High or Low, or may be set to toggle during conversion at either the same rate or half
the rate of the Elementary Conversion. This may be useful to help eliminate bandgap related internal offset voltage and 1/fs noise.
Over-Sampling Frequency
The word FIN[1:0] (see Table 10) is used to select the over-sampling frequency fs. The over-sampling frequency
is derived from the 4MHz oscillator clock.
FIN[1:0]
(RegACCfg2[7:6])
Over-Sampling Frequency fs (Hz)
00
62.5 kHz
01
125 kHz
10
250 kHz
11
500 kHz
Table 10 - Over-Sampling Frequency Settings
Init
Elementary
Conversion
Elementary
Conversion
Elementary
Conversion
Elementary
Conversion
End
Conversion index
Offset
1
2
N
ELCONV-1
N
ELCONV
Conversion
Result
+
-
+
-
T
CONV
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