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參數(shù)資料
| 型號(hào)： | SY100E151JZ |
| 廠商： | MICREL INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 6-BIT D REGISTER |
| 中文描述： | 100E SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC28 |
| 封裝： | LEAD FREE, PLASTIC, LCC-28 |
| 文件頁(yè)數(shù)： | 1/4頁(yè) |
| 文件大?。?/td> | 70K |
| 代理商： | SY100E151JZ |
1
SY10E151
SY10E151
SY100E151
Micrel, Inc.
M9999-032006
hbwhelp@micrel.com or (408) 955-1690
I
1100MHz toggle frequency
I
Extended 100E V
EE
range of –4.2V to –5.46V
I
Differential outputs
I
Asynchronous Master Reset
I
Dual clocks
I
Fully compatible with industry standard 10KH,
100K ECL levels
I
Internal 75K
input pulldown resistors
I
Fully compatible with Motorola MC10E/100E151
I
Available in 28-pin PLCC package
FEATURES
6-BIT D
REGISTER
The SY10/100E151 offer 6 edge-triggered, high-speed,
master-slave D-type flip-flops with differential outputs,
designed for use in new, high-performance ECL systems.
The two external clock signals (CLK
1
, CLK
2
) are gated
through a logical OR operation before use as clocking
control for the flip-flops. Data is clocked into the flip-flops
on the rising edge of either CLK
1
or CLK
2
(or both). When
both CLK
1
and CLK
2
are at a logic LOW, data enters the
master and is transferred to the slave when either CLK
1
or
CLK
2
(or both) go HIGH.
The MR (Master Reset) signal operates asynchronously
to make all Q outputs go to a logic LOW.
DESCRIPTION
BLOCK DIAGRAM
Pin
Function
D
0
–D
5
Data Inputs
CLK
1
, CLK
2
Clock Inputs
MR
Master Reset
Q
0
–Q
5
True Outputs
Q
0
–Q
5
Inverting Outputs
V
CCO
V
CC
to Output
PIN NAMES
D
R
D
R
D
R
D
R
D
R
D
R
M
R
D
0
CLK
1
CLK
2
D
1
D
2
D
3
D
4
D
5
Q
0
Q
0
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
Q
4
Q
4
Q
5
Q
5
Rev.: G
Issue Date:
Amendment: /0
March 2006
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SY100E151JZTR | 6-BIT D REGISTER |
| SY100E154JC | 5-BIT 2:1 MUX-LATCH |
| SY100E154JCTR | 5-BIT 2:1 MUX-LATCH |
| SY10E154 | 5-BIT 2:1 MUX-LATCH |
| SY10E154JC | 5-BIT 2:1 MUX-LATCH |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100E151JZ TR | 功能描述:寄存器 6-bit D Register (Lead Free) RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| SY100E151JZTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:6-BIT D REGISTER |
| SY100E154 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:5-BIT 2:1 MUX-LATCH |
| SY100E154JC | 功能描述:IC MUX-LATCH 5-BIT 2:1 28-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 信號(hào)開(kāi)關(guān)，多路復(fù)用器，解碼器 系列:100E 標(biāo)準(zhǔn)包裝:25 系列:74HC 類型:解碼器 電路:1 x 2:4 獨(dú)立電路:2 輸出電流高，低:5.2mA，5.2mA 電壓電源:單電源 電源電壓:2 V ~ 6 V 工作溫度:-40°C ~ 85°C 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-DIP 包裝:管件 |
| SY100E154JCTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:5-BIT 2:1 MUX-LATCH |
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