參數(shù)資料
型號(hào): SY100E222LTY
廠商: Micrel Inc
文件頁(yè)數(shù): 1/7頁(yè)
文件大?。?/td> 0K
描述: IC CLOCK GEN/BUFF LVPECL 52LQFP
標(biāo)準(zhǔn)包裝: 160
系列: 100E, Precision Edge®
類型: 時(shí)鐘發(fā)生器
PLL: 無(wú)
輸入: LVECL,LVPECL
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 2:15
差分 - 輸入:輸出: 是/是
頻率 - 最大: 1.5GHz
除法器/乘法器: 是/無(wú)
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 52-LQFP
供應(yīng)商設(shè)備封裝: 52-LQFP(10x10)
包裝: 管件
產(chǎn)品目錄頁(yè)面: 1087 (CN2011-ZH PDF)
其它名稱: 576-1971-5
SY100E222LTY-ND
1
Micrel, Inc.
Precision Edge
SY100E222L
M9999-021511
hbwhelp@micrel.com or (408) 955-1690
DESCRIPTION
■ Four programmable output banks and 15 total
LVPECL-compatible differential outputs
■ Pin-compatible, plug-in replacement to
MC100LVE222FA
■ f
MAX clock = 1.5GHz
■ 50ps output-to-output skew
■ Four output banks with independent ÷1, ÷2
frequency control
■ 100k compatible I/O
■ Power supply 3.3V ±10%
■ –40°C to +85°C temperature range
■ Available in 52-pin LQFP package
FEATURES
3.3V, 1.5GHz
÷1/÷2 DIFFERENTIAL
LVECL/LVPECL PROGRAMMABLE CLOCK
GENERATOR AND 1:15 FANOUT BUFFER
Precision Edge
SY100E222L
APPLICATIONS
■ SONET/SDH channel applications
■ Fibre Channel multi-channel applications
■ Gigabit Ethernet multi-channel applications
Rev.: C
Amendment: /0
Issue Date:
February 2011
The SY100E222L is a low-skew, low-jitter device capable
of receiving a high-speed LVECL/LVPECL input in either a
single-ended or differential configuration. For single-ended
configurations, a VBB output reference is supplied by the
SY100E222L. A 2:1 input multiplexer selects from two
differential input pairs by means of the CLK_SEL input select.
The internal programmable divider for each of the four
banks generates a ÷1 or ÷2 frequency of the selected input.
The ÷1/÷2 divider outputs can be asynchronously
synchronized with the master reset (MR) input so that the
outputs will start out in a known state.
The 15 total outputs are partitioned into four independently
selected output banks in a 2/3/4/6 fanout configuration. Each
of the four banks can independently select the ÷1 or ÷2
output frequency by means of the four separate frequency
select pins (FSELA-FSELD) inputs.
The SY100E222L is pin-for-pin compatible with the
MC100LVE222FA device.
The SY100E222L is part of a Micrel’s Precision Edge
product family. For other integrated clock divider plus fanout
buffer options, consider Micrel’s SY89200 family.
All support documentation can be found on Micrel’s web
site at www.micrel.com.
FUNCTIONAL BLOCK DIAGRAM
Micrel Part Number
ON Semiconductor
SY100E222LTI
MC100LVE222FA
SY100E222LTI TR
MC100LVE222FAR2
CROSS REFERENCE TABLE
QD0
/QD0
QD1
/QD1
QD2
/QD2
QD3
/QD3
QD4
/QD4
QD5
/QD5
2:1
MUX
1:6 FOB
QC0
/QC0
QC1
/QC1
QC2
/QC2
QC3
/QC3
2:1
MUX
1:4 FOB
QB0
/QB0
QB1
/QB1
QB2
/QB2
2:1
MUX
1:3 FOB
QA0
/QA0
QA1
/QA1
2:1
MUX
1:2 FOB
CLK_SEL
CLK0
/CLK0
CLK1
/CLK1
VBB
MR
FSELA
FSELB
FSELC
FSELD
2:1
MUX
CLK
÷1
÷2
Precision Edge
Precision Edge is a registered trademark of Micrel, Inc.
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