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參數(shù)資料
| 型號(hào)： | SY100E417 |
| 廠商： | Micrel Semiconductor,Inc. |
| 英文描述： | Quint LVPECL-to-PECL or PECL-TO-LVPECL Translator(五 LVPECL-PECL 或 PECL-LVPECL電平轉(zhuǎn)換器) |
| 中文描述： | 昆特的LVPECL到PECL的或PECL的對(duì)翻譯的LVPECL（五的LVPECL，PECL的或PECL的，LVPECL的電平轉(zhuǎn)換器） |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 73K |
| 代理商： | SY100E417 |
DESCRIPTION
I
3.3V and 5V power supplies required
I
Also, supports LVPECL-to-PECL translation
I
500ps propagation delays
I
Fully differential design
I
Differential line receiver capability
I
Available in 28-pin PLCC package
The SY100E417 is a quint LVPECL-to-PECL translator.
It can also be used as a quint PECL-to-LVPECL translator.
The device receives standard PECL signals and translates
them to differential LVPECL output signals (or vice versa).
The SY100E417 can also be used as a differential line
receiver for PECL-to-PECL or LVPECL-to-LVPECL signals.
However, please note that for the latter we will need two
different power supplies. Please refer to Function Table for
more details.
A V
BB
output is provided for interfacing single ended
input signals. If a single ended input is to be used, the V
BB
output should be connected to the Dn input and the active
signal will drive the Dn input. When used, the V
BB
should
be bypassed to V
CC
via a 0.01
μ
F capacitor. The V
BB
is
designed to act as a switching reference for the SY100E417
under single ended input conditions. As a result, the pin
can only source/sink 0.5mA of current.
To accomplish the PECL-to-LVPECL level translation,
the SY100E417 requires three power rails. The V
CC
and
V
CC
_V
BB
supply is to be connected to the standard PECL
supply, the 3.3V supply is to be connected to the V
CCO
supply, and GND is connected to the system ground plane.
Both the V
CC
and V
CCO
should be bypassed to ground with
a 0.01
μ
F capacitor.
To accomplish the LVPECL-to-PECL level translation,
the SY100E417 requires three power rails as well. The 5.0V
supply is connected to the V
CC
and V
CCO
pins, 3.3V supply
is connected to the V
CC
_V
BB
pin and GND is connected to
the system ground plane. V
CC
_V
BB
is used to provide a
proper V
BB
output level if a single ended input is used.
V
CC
_V
BB
= 3.3V is only required for single-ended LVPECL
input. For differential LVPECL input, V
CC
_V
BB
can be either
3.3V or 5.0V.
Under open input conditions, the Dn input will be biased
at a V
CC
/2 voltage level and the Dn input will be pulled to
GND. This condition will force the "Qn" output low, ensuring
stability.
FEATURES
QUINT LVPECL-TO-PECL
OR PECL-TO-LVPECL
TRANSLATOR
SY100E417
Rev.: B
Issue Date:
Amendment: /1
March, 1999
BLOCK DIAGRAM
D
0
D
0
Q
0
Q
0
D
1
D
1
Q
1
Q
1
D
2
D
2
Q
2
Q
2
D
3
D
3
Q
3
Q
3
D
4
D
4
Q
4
Q
4
V
BB
Function
Vcc
Vcco
Vcc_V
BB
PECL-to-LVPECL
5.0V
3.3V
5.0V
LVPECL-to-PECL
5.0V
5.0V
3.3V
PECL-to-PECL
5.0V
5.0V
5.0V
LVPECL-to-LVPECL
5.0V
3.3V
3.3V
FUNCTION TABLE
1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100E417_06 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:QUINT LVPECL-TO-PECL QUINT LVPECL-TO-PECL TRANSLATOR |
| SY100E417JC | 功能描述:IC TRANSLATOR QUINT 28-PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 變換器 系列:100E 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- 邏輯功能:變換器，雙向 位數(shù):2 輸入類型:CMOS 輸出類型:CMOS 數(shù)據(jù)速率:16Mbps 通道數(shù):2 輸出/通道數(shù)目:1 差分 - 輸入:輸出:無/無 傳輸延遲（最大）:15ns 電源電壓:1.65 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:10-UFQFN 供應(yīng)商設(shè)備封裝:10-UTQFN（1.4x1.8） 包裝:管件 |
| SY100E417JC TR | 功能描述:IC TRANSLATOR QUINT PECL 28PLCC RoHS:否 類別:集成電路 (IC) >> 邏輯 - 變換器 系列:100E 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- 邏輯功能:變換器，雙向 位數(shù):2 輸入類型:CMOS 輸出類型:CMOS 數(shù)據(jù)速率:16Mbps 通道數(shù):2 輸出/通道數(shù)目:1 差分 - 輸入:輸出:無/無 傳輸延遲（最大）:15ns 電源電壓:1.65 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:10-UFQFN 供應(yīng)商設(shè)備封裝:10-UTQFN（1.4x1.8） 包裝:管件 |
| SY100E417JCTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:QUINT LVPECL-TO-PECL OR PECL-TO-LVPECL TRANSLATOR |
| SY100E417JG TR | 功能描述:IC TRANSLATOR QUINT PECL 28PLCC RoHS:是 類別:集成電路 (IC) >> 邏輯 - 變換器 系列:100E 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:100 系列:- 邏輯功能:變換器，雙向 位數(shù):2 輸入類型:CMOS 輸出類型:CMOS 數(shù)據(jù)速率:16Mbps 通道數(shù):2 輸出/通道數(shù)目:1 差分 - 輸入:輸出:無/無 傳輸延遲（最大）:15ns 電源電壓:1.65 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:10-UFQFN 供應(yīng)商設(shè)備封裝:10-UTQFN（1.4x1.8） 包裝:管件 |
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