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參數(shù)資料
| 型號(hào)： | SY100EL15LZC |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK BUFFER MUX 2:4 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 48 |
| 系列： | 100EL, Precision Edge® |
| 類型： | 扇出緩沖器（分配），多路復(fù)用器 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:4 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | ECL，PECL |
| 輸出： | ECL，PECL |
| 電源電壓： | 3 V ~ 3.8 V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 管件 |
1
Precision Edge
SY100EL15L
Micrel, Inc.
M9999-031306
hbwhelp@micrel.com or (408) 955-1690
The SY100EL15L is a low skew 1:4 clock distribution
IC designed explicitly for low skew clock distribution
applications. The device can be driven by either a
differential or single-ended ECL or, if positive power
supplies are used, PECL input signal. If a single-ended
input is to be used the VBB output should be connected
to the CLK input and bypassed to ground via a 0.01
F
capacitor. The VBB output is designed to act as the
switching reference for the input of the EL15 under single-
ended input conditions. As a result, this pin can only
source/sink up to 0.5mA of current.
The EL15 features a multiplexed clock input to allow
for the distribution of a lower speed scan or test clock
along with the high speed system clock. When LOW (or
left open and pulled LOW by the input pull-down resistor)
the SEL pin will select the differential clock input.
The common enable (EN) is synchronous so that the
outputs will only be enabled/disabled when they are
already in the LOW state. This avoids any chance of
generating a runt clock pulse when the device is enabled/
disabled as can happen with an asynchronous control.
The internal flip flop is clocked on the falling edge of the
input clock, therefore all associated specification limits
are referenced to the negative edge of the clock input.
When both differential inputs are left open, CLK input
will pull down to VEE and CLK input will bias around
VCC/2.
Pin
Function
CLK
Differential Clock Inputs
SCLK
Synchronous Clock Input
EN
Synchronous Enable
SEL
Clock Select Input
VBB
Reference Output
Q0-3
Differential Clock Outputs
TRUTH TABLE
PIN NAMES
FEATURES
DESCRIPTION
Precision Edge
SY100EL15L
CLK
SCLK
SEL
EN
Q
L
X
LLL
HX
L
H
XL
H
L
XH
H
L
H
XX
X
H
L*
* On next negative transition of CLK or SCLK
s 3.3V power supply
s 50ps output-to-output skew
s Low power
s Synchronous enable/disable
s Multiplexed clock input
s 75K
internal input pull-down resistors
s Available in 16-pin SOIC package
3.3V 1:4 CLOCK
DISTRIBUTION
1
Rev.: D
Amendment: /0
Issue Date:
March 2006
Precision Edge is a registered trademark of Micrel, Inc.
Precision Edge
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100EL15LZC TR | 功能描述:IC CLOCK BUFFER MUX 2:4 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器 系列:100EL, Precision Edge® 標(biāo)準(zhǔn)包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復(fù)用器 電路數(shù):1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
| SY100EL15LZCTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 1:4 CLOCK DISTRIBUTION |
| SY100EL15LZG | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 3.3V 1:4 Clock Distribution (I Temp, Green) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| SY100EL15LZG TR | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 3.3V 1:4 Clock Distribution (I Temp, Green) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| SY100EL15LZGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 1:4 CLOCK DISTRIBUTION |
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