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參數(shù)資料
| 型號(hào)： | SY100EL38LZC |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK GEN /2 /4/6 5/3.3V 20SOIC |
| 標(biāo)準(zhǔn)包裝： | 38 |
| 系列： | 100EL, Precision Edge® |
| 類型： | 時(shí)鐘發(fā)生器 |
| PLL： | 無 |
| 輸入： | ECL，PECL |
| 輸出： | 時(shí)鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:5 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 1GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3 V ~ 3.8 V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SOIC（寬型） |
| 包裝： | 管件 |
1
Precision Edge
SY10EL38/L
SY100EL38/L
Micrel, Inc.
M9999-031006
hbwhelp@micrel.com or (408) 955-1690
The SY10/100EL38/L are low skew
÷2, ÷4/6 clock
generation chips designed explicitly for low skew clock
generation applications. The internal dividers are
synchronous to each other, therefore, the common output
edges are all precisely aligned. The devices can be driven
by either a differential or single-ended ECL or, if positive
power supplies are used, PECL input signal. In addition,
by using the VBB output, a sinusoidal source can be AC-
coupled into the device. If a single-ended input is to be
used, the VBB output should be connected to the CLK
input and bypassed to ground via a 0.01
F capacitor.
The VBB output is designed to act as the switching
reference for the input of the EL38/L under single-ended
input conditions. As a result, this pin can only source/
sink up to 0.5mA of current.
The common enable (EN) is synchronous so that the
internal dividers will only be enabled/disabled when the
internal clock is already in the LOW state. This avoids
any chance of generating a runt clock pulse on the
internal clock when the device is enabled/disabled as
can happen with an asynchronous control. An internal
runt pulse could lead to losing synchronization between
the internal divider stages. The internal enable flip-flop is
clocked on the falling edge of the input clock, therefore,
all associated specification limits are referenced to the
negative edge of the clock input.
The Phase_Out output will go HIGH for one clock cycle
whenever the
÷2 and the ÷4/6 outputs are both
transitioning from a LOW to a HIGH. This output allows
for clock synchronization within the system.
Upon start-up, the internal flip-flops will attain a
random state; the master reset (MR) input allows for the
synchronization of the internal dividers, as well as for
multiple EL38/Ls in a system.
s 3.3V and 5V power supply options
s 50ps output-to-output skew
s Synchronous enable/disable
s Master Reset for synchronization
s Internal 75K
input pull-down resistors
s Available in 20-pin SOIC package
DESCRIPTION
FEATURES
5V/3.3V
÷2, ÷4/6 CLOCK
GENERATION CHIP
Precision Edge
SY10EL38/L
SY100EL38/L
Rev.: G
Amendment: /0
Issue Date:
March 2006
Precision Edge
Precision Edge is a registered trademark of Micrel, Inc.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY100EL38LZC TR | 功能描述:IC CLK GEN /2 /4/6 5/3.3V 20SOIC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:100EL, Precision Edge® 標(biāo)準(zhǔn)包裝:27 系列:Precision Edge® 類型:頻率合成器 PLL:是 輸入:PECL，晶體 輸出:PECL 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/是 頻率 - 最大:800MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 5.25 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC 包裝:管件 |
| SY100EL38LZCTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:5V/3.3V ±2, ±4/6 CLOCK GENERATION CHIP |
| SY100EL38LZG | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 3.3V /2, /4-/6 Clock Generation Chip (I Temp, Green) RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SY100EL38LZG TR | 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 3.3V /2, /4-/6 Clock Generation Chip (I Temp, Green) RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SY100EL38LZGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:5V/3.3V ÷2, ÷4/6 CLOCK GENERATION CHIP |
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