參數(shù)資料
型號: SY56034ARMG
廠商: Micrel Inc
文件頁數(shù): 4/10頁
文件大小: 0K
描述: IC MULTIPLEXER 32MLF
標準包裝: 60
系列: Precision Edge®
功能: 多路復用器
電路: 2 x 2:1
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 2.375 V ~ 2.625 V,1.14 V ~ 1.9 V
電流 - 電源: 100mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,32-MLF?
供應商設備封裝: 32-MLF?(5x5)
包裝: 管件
產(chǎn)品目錄頁面: 1089 (CN2011-ZH PDF)
其它名稱: 576-3310-5
Micrel, Inc.
SY56034AR
September 2008
3
M9999-093008-A
hbwhelp@micrel.com or (408) 955-1690
Pin Description
Pin Number
Pin Name
Pin Function
2,3
6,7
IN0, /IN0
IN1,/IN1
Differential Inputs: These input pairs are the differential signal inputs to the device.
They accept differential signals as small as 100mV (200mVPP). Each input pin
internally terminates with 50
to the VT pin.
1
8
VT0
VT1
Input Termination Center-Tap: Each side of the differential input pair terminates to a
VT pin. This pin provides a center-tap to a termination network for maximum
interface flexibility. An internal high impedance resistor divider biases VT to allow
input AC-coupling. For AC-coupling, bypass VT with a 0.1F low ESR capacitor to
VCC. See “Interface Applications” subsection and Figure 2a.
4
5
SEL0
SEL1
These single-ended TTL/CMOS-compatible inputs select the inputs to the
crosspoint switch. Note that each of these inputs is internally connected to a 25k
pull-up resistor and will default to a logic HIGH state if left open.
10, 31
VCC
Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors as close to
the VCC pin as possible. Supplies input and core circuitry.
11,16,18,
23,25,30
VCCO
Output Supply: Bypass with 0.1F//0.01F low ESR capacitors as close to the VCCO
pins as possible. Supplies the output buffer.
9,17,24,32
GND,
Exposed pad
Ground: Exposed pad must be connected to a ground plane that is the same
potential as the ground pin.
29,28
27,26
22,21
20,19
15,14
13,12
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
Q4, /Q4
Q5, /Q5
CML Differential Output Pairs: Differential buffered copy of the selected input signal.
The output swing is typically 390mV. See “Interface Applications” subsection for
termination information. Output pairs Q0 to Q3 belong to Bank 1. Q4 and Q5 belong
to Bank 2.
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