參數(shù)資料
型號(hào): SY58608UMGTR
廠商: MICREL INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 3.2Gbps Precision, 1:2 LVDS Fanout Buffer with Internal Termination and Fail Safe Input
中文描述: 58608 SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16
封裝: 3 X 3 MM, LEAD FREE, MLF-16
文件頁數(shù): 6/12頁
文件大?。?/td> 286K
代理商: SY58608UMGTR
Micrel, Inc.
SY58608U
October 2006
6
M9999-102706-A
hbwhelp@micrel.com
or (408) 955-1690
Functional Description
Fail-Safe Input (FSI)
The input includes a special fail-safe circuit to sense
the amplitude of the input signal and to latch the
outputs when there is no input signal present, or
when the amplitude of the input signal drops
sufficiently below 100mV
PK
(200mV
PP
), typically
30mV
PK
. Maximum frequency of SY58608U is limited
by the FSI function.
Input Clock Failure Case
If the input clock fails to a floating, static, or extremely
low signal swing such that the differential voltage
across the input pair is less than 100mV, the FSI
function will eliminate a metastable condition and latch
the outputs to the last valid state. No ringing and no
indeterminate state will occur at the output under
these conditions. The output recovers to normal
operation once the input signal returns to a valid state
with a differential voltage
100mV.
Note that the FSI function will not prevent duty cycle
distortion in case of a slowly deteriorating (but still
toggling) input signal. Due to the FSI function, the
propagation delay will depend on rise and fall time of
the input signal and on its amplitude. Refer to “Typical
Characteristics” for detailed information.
Timing Diagrams
Figure 1a. Propagation Delay
Figure 1b. Fail Safe Feature
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