參數(shù)資料
型號: SY58611UMG
廠商: MICREL INC
元件分類: 通用總線功能
英文描述: 3.2Gbps Precision, LVDS 2:1 MUX with Internal Termination and Fail Safe Input
中文描述: 58611 SERIES, 2 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, QCC16
封裝: 3 X 3 MM, LEAD FREE, MLF-16
文件頁數(shù): 2/13頁
文件大?。?/td> 616K
代理商: SY58611UMG
Micrel, Inc.
SY58611U
Ordering Information
(1)
March 2007
2
M9999-030607-A
hbwhelp@micrel.com
or (408) 955-1690
Part Number
Package
Type
MLF-16
Operating
Range
Industrial
Package Marking
Lead
Finish
NiPdAu
Pb-Free
NiPdAu
Pb-Free
SY58611UMG
611U with Pb-Free
bar-line indicator
611U with Pb-Free
bar-line indicator
SY58611UMGTR
(2)
MLF-16
Industrial
Notes:
1. Contact factory for die availability. Dice are guaranteed at T
A
= 25°C, DC Electricals only.
2. Tape and Reel.
Pin Configuration
16-Pin MLF
(MLF-16)
Truth Table
SEL
0
1
Output
IN0 Selected
IN1 Selected
Pin Description
Pin Number
1, 4
Pin Name
VT0, VT1
Pin Function
Input Termination Center-Tap: Each side of the differential input pair terminates to the VT pin.
This pin provides a center-tap to a termination network for maximum interface flexibility. See
“Input Interface Applications” subsection.
Reference Voltage: These outputs bias to V
CC
–1.2V. They are used for AC-coupling inputs IN
and /IN. Connect VREF-AC directly to the corresponding VT pin. Bypass with 0.01μF low ESR
capacitor to VCC. Due to limited drive capability, the VREF-AC pin is only intended to drive its
respective VT pin. Maximum sink/source current is ±0.5mA. See “Input Interface Applications”
subsection.
Differential Inputs: These input pairs are the differential signal inputs to the device. Inputs
accept AC- or DC-Coupled differential signals as small as 100mV
(200mV
PP
). Each pin of the
pairs internally terminates with 50
to the V
T
pin. If the input swing falls below a certain
threshold (typical 30mV), the Fail Safe Input (FSI) feature will guarantee a stable output by
latching the output to its last valid state. See “Input Interface Applications” subsection.
Single-Ended Input: This single-ended TTL/CMOS-compatible input selects the inputs to the
multiplexer. Note that this input is internally connected to a 25k
pull-up resistor and will default
to logic HIGH state if left open. The input-switching threshold is V
CC
/2.
Positive Power Supply: Bypass with 0.1μF//0.01μF low ESR capacitors as close to the V
CC
pins
as possible.
LVDS Differential Output Pair: Differential buffered output copy of the selected input signal. The
output swing is typically 325mV. Normally terminated 100
across the output (Q and /Q). See
“LVDS Output Interface Applications” subsection.
Ground. Exposed pad must be connected to a ground plane that is the same potential as the
ground pin.
No connect.
2, 3
VREF-AC0,
VREF-AC1
5, 6
15, 16
IN1, /IN1
IN0, /IN0
7
SEL
8, 13
VCC
9, 12
/Q, Q
10, 11
GND,
Exposed pad
NC
14
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SY58611UMG TR 功能描述:編碼器、解碼器、復用器和解復用器 3.2Gbps 2:1 LVDS Mux w/ FSI Inputs RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量(輸入/輸出):2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray
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