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參數(shù)資料
| 型號： | SY58626LMH |
| 廠商： | MICREL INC |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | DC-to-6.4Gbps Backplane Transmit Buffer with Selectable Output Pre-emphasis, I/O DCOffset Control, and 200mV-3.0VPP Output Swing |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, QCC32 |
| 封裝： | 5 X 5 MM, LEAD FREE, MLF-32 |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 830K |
| 代理商： | SY58626LMH |
Micrel, Inc.
SY58626L
March 2006
5
M9999-030206-B
hbwhelp@micrel.com
or (408) 955-1690
Pin Description
(Continued)
Pin Number
Pin Name
Pin Function
27, 28
TXLBQ,
/TXLBQ
Transmit loopback differential output: CML compatible output pair with 400mV swing
into a 50
load (100
across the pair). The TXLBQ output pair is providing a copy of
the TXIN input signal, bypassing the pre-emphasis stage. The SY58626L loopback
function is optimized to operate with the SY58627L receiver, and the TXLBQ output
pair is AC-coupled directly to the TXLBIN input pair on the SY58627L.
23
/TXQSHDN
TXQ shutdown control pin: The TTL/CMOS (or VTH controlled) compatible pin is an
active LOW function. This input is internally connected to a 25k
pull-up resistor and
will default to a logic HIGH state if left open. When pulled LOW, the TXQ and /TXQ
output currents are shut off, and the TXQ and /TXQ output voltage is set to the same
potential. The actual voltage level is set by the resistor divider ratio established by
the internal 50
source resistors (connected to VTTOUT) and the external load.
Default threshold is Vcc/2 when VTH pin is floating.
2
VTH
Input logic threshold control voltage for logic control threshold settings other than
LVTTL/CMOS. This input control pin can be externally biased to set the proper
threshold for all the logic control pins, /TXEN, LBSEL, /TXLBEN, 3-bit pre-emphasis
control, 2-bit pre-emphasis duration control, and /TXQSHDN. For standard
LVTTL/CMOS control, simply leave the VTH pin floating and the threshold voltage
defaults to V
CC
/2 (When VEE=0V). For LVPECL thresholds, set VTH to Vcc-1.3V.
Differential variable swing output pair: This CML output pair is the output of the
device. This output is designed to drive 100mV
PK
to 1.5V
PK
into 50
(100
across
the pair) with variable pre-emphasis. TXQ outputs include 50
source termination
resistors. When the loopback mode is selected, the TXQ output pair is driven by the
RXLBIN inputs.
21, 20
TXQ,
/TXQ
19, 22
VTTOUT
Output termination center-tap: Each side of the differential output pair terminates to
the VTTOUT
pin through 50
. The VTTOUT pin provides a center-tap to the output
termination network for maximum interface flexibility, and DC-offset capability.
Please refer to the “CML Output Interface Applications” section for more details.
17
18
32
MAG_CTRL0
MAG_CTRL1
MAG_CTRL2
Pre-emphasis magnitude level control input: TTL/CMOS (or VTH controlled)
compatible, 3-bit control interface. There are four levels of pre-emphasis magnitude,
as shown in the “Pre-Emphasis Magnitude Truth Table.” When MAG_CTRL2 (MSB)
is logic 1, pre-emphasis is disabled and the TXQ outputs will not include any pre-
emphasis. Pre-emphasis magnitude ranges from 10% to 33% above the base swing.
10
11
DUR_CTRL0
DUR_CTRL1
Pre-emphasis duration control input. TTL/CMOS (or VTH controlled) compatible, 2-bit
control interface. This control establishes the pre-emphasis duration. Duration ranges
from 60ps to 400ps typical as shown in the “Pre-emphasis Duration Control Truth
Table.” Pre-emphasis duration is measured from the mid-point of the pre-emphasis
magnitude (50% point). Please refer to the “Pre-emphasis Output Description” for
details.
9, 15, 26
VCC
Positive power supply: Connect to +3.3V power supply. Bypass with 0.1μF//0.01μF
low ESR capacitors as close to VCC pins as possible.
3, 6, 16, 25
VEE,
Exposed Pad
Ground: Ground pins and exposed pad must be connected to the same ground
plane.
相關PDF資料 |
PDF描述 |
|---|---|
| SY58626LMHTR | DC-to-6.4Gbps Backplane Transmit Buffer with Selectable Output Pre-emphasis, I/O DCOffset Control, and 200mV-3.0VPP Output Swing |
| SY58627L | DC-to-6.4Gbps Backplane Receive Buffer with Four Stage Programmable Equalization and DC-Offset Control |
| SY58627LMG | DC-to-6.4Gbps Backplane Receive Buffer with Four Stage Programmable Equalization and DC-Offset Control |
| SY58627LMGTR | DC-to-6.4Gbps Backplane Receive Buffer with Four Stage Programmable Equalization and DC-Offset Control |
| SY69753AL | 3.3V, 125Mbps, 155Mbps Clock and Data Recovery |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SY58626LMH TR | 功能描述:總線發(fā)射器 6.4Gbps Transmitter w/ Pre-emphasis (Green) RoHS:否 制造商:Texas Instruments 數(shù)據(jù)速率:135 Mpps 接口: 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-56 封裝:Reel |
| SY58626LMHTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:DC-to-6.4Gbps Backplane Transmit Buffer with Selectable Output Pre-emphasis, I/O DCOffset Control, and 200mV-3.0VPP Output Swing |
| SY58627L | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:DC-to-6.4Gbps Backplane Receive Buffer with Four Stage Programmable Equalization and DC-Offset Control |
| SY58627LMG | 功能描述:緩沖器和線路驅(qū)動器 6.4Gbps Receiver w/ Equalization (I Temp, Green) RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SY58627LMG TR | 功能描述:緩沖器和線路驅(qū)動器 6.4Gbps Receiver w/ Equalization (I Temp, Green) RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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