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參數(shù)資料
| 型號： | SY87729LHY TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 16/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SYNTHESIZER FRACTION N 32TQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | AnyClock® |
| 類型： | 分數(shù)合成器 |
| PLL： | 是 |
| 主要目的： | 以太網(wǎng)，光纖通道，SONET/SDH/ATM |
| 輸入： | PECL |
| 輸出： | PECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 365MHz |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-EPAD-TQFP |
| 包裝： | 帶卷 (TR) |
| 配用： | 576-1404-ND - BOARD EVAL N SY87729 EXPERIMENT |
| 其它名稱： | SY87729LHYTR SY87729LHYTR-ND |
Micrel, Inc.
SY87729L
July 2011
8
M9999-072111-G
hbwhelp@micrel.com
Functional Description
The SY87729L AnyClock
Fractional-N Synthesizer is
used in serial data streaming applications, where the
incoming data rate on a channel may vary, or where the
incoming data rate on a channel is unknown ahead of
time.
In these situations, a valid output stream must still be
generated even in the absence of any edges on the
corresponding input stream. Until now, designers had to
resort to sub-optimal solutions such as providing multiple
reference oscillators. Beyond the potential noise and
EMI issues, the designer has no way to future proof his
circuit, as it would prove near impossible to pre-provision
all the reference frequencies that might be needed after
deployment, yet are unknown at this time.
The SY87729L solves this problem by generating exact
frequencies for common data streaming protocols, all
from one 27MHz reference. If any of these protocols
include overhead due to use of common digital
wrappers, the SY87729L still generates the exact
frequency required, including the overhead.
Besides generating reference rates for common
protocols directly, The SY87729L also generates
reference frequencies for Micrel’s SY87721L CDR/CMU,
such that it will reliably recover data at any rate between
28Mbps and 2,700Mbps without any gaps.
A simple 3-wire MicroWire bit-serial interface loads a
configuration that describes the desired output reference
frequency. All common microcontrollers support this
MicroWire interface. Those microcontrollers that don’t
support this interface in hardware can easily emulate the
interface in firmware.
The large set of possible frequencies that the SY87729L
generates, are divided into three classes. First, the sets
of frequencies that match a particular data streaming
protocol are in the “protocol” category. Second, the set
of frequencies that are guaranteed to be near enough to
any arbitrary data rate such that the SY87721L will lock
are in the “picket fence” category. Third, the set of
frequencies that do not fit into either of the first two
categories is in the third category,
The SY87729L generates these important reference
frequencies through two tandem PLL circuits. The first
PLL uses a modified fractional-N approach to generate a
rational ratio frequency. This PLL is capable of
generating all protocol data rates, except for those that
include FEC or digital wrapper overhead. A second,
more traditional P/Q synthesizer optionally adjusts the
output frequency of the first, fractional-N synthesizer, to
accommodate these FEC or digital wrapper data rates.
The bit serial interface conveys 32 bits of configuration
data from a microcontroller to SY87729L. This simple
interface consists of an active high chip select, a serial
clock (2MHz or less) and a serial data input. Each clock
cycle one bit of configuration data transfers to
SY87729L.
Circuit Description
The heart of SY87729L is its fractional-N synthesizer, as
shown in Figure 1.
Figure 1. Fractional-N Synthesizer Architecture
The two dividers in the feedback path always differ by
one count. That is, if one divider is set to divide by P =
5, then the other divider divides by P-1 = 4 . The
mux chooses between the two based on the control
circuit.
The idea behind the fractional-N approach is that every
input reference edge is used. Only those output edges
that are nearest to an input edge get fed back to the
phase-frequency comparator. In addition, the nearest
output edges are chosen in such a way that the net
offset, over a number of edges, zeroes out. It is the
control circuit’s job to drive the mux such that only the
“correct” edges get fed back.
In the above fractional-N circuit, if the output frequency
should be, for example, 5 times the input frequency, then
P is set to 5, and the control circuit sets the mux to only
feed back the output of the P divider.
If the output frequency should be, for example, 4 1/2
times the input frequency, then the control circuit
alternates evenly between the P and the P-1 divider
output. For every two input edges (one to compare
against P, and another to compare against P-1), you will
get 5 + 4 output edges, yielding an output frequency 9/2
the input frequency.
or (408) 955-1690
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY87739L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Protocol Transparent 3.3V 10MHz to 729MHz Fractional-N Synthesizer |
| SY87739L_07 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:PROTOCOL TRANSPARENT 3.3V 10MHz to 729MHz FRACTIONAL-N SYNTHESIZER |
| SY87739L_11 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Protocol Transparent, 3.3V, 10MHz to 729MHz, Fractional-N Synthesizer |
| SY87739LHG | 功能描述:IC SYNTHESIZER FRACT 3.3V 32TQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:AnyClock® 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
| SY87739LHI | 功能描述:IC SYNTHESIZER FRACT 3.3V 32TQFP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 專用 系列:AnyClock® 標(biāo)準(zhǔn)包裝:1,500 系列:- 類型:時鐘緩沖器/驅(qū)動器 PLL:是 主要目的:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 電源電壓:3.3V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SSOP（0.209"，5.30mm 寬） 供應(yīng)商設(shè)備封裝:28-SSOP 包裝:帶卷 (TR) 其它名稱:93786AFT |
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