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參數(shù)資料
| 型號： | SY88345BLMG TR |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 7/10頁 |
| 文件大小： | 0K |
| 描述： | IC POST AMP CML LP LIMIT 16-MLF |
| 標準包裝： | 1,000 |
| 類型： | 限幅后置放大器 |
| 應(yīng)用： | 光纖學網(wǎng)絡(luò) |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤，16-MLF? |
| 供應(yīng)商設(shè)備封裝： | 16-MLF?（3x3） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | SY88345BLMGTR SY88345BLMGTR-ND |
Micrel, Inc.
SY89853U
August 2007
6
M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
AC Electrical Characteristics
(6)
VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C to + 85°C, RL = 50
to V
CC–2V, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Operating Frequency
NRZ Data
2.5
Gbps
Clock, VOUT > 400mV
2.5
GHz
tpd
Propagation Delay
IN-to-Q
SEL-to-Q
160
250
360
ps
100
260
400
ps
tpd
Tempco
Differential Propagation Delay
Temperature Coefficient
143
fs/ C
tSKEW
Input-to-Input Skew (Within-bank)
Bank-to-Bank Skew
Note 7
10
20
ps
Note 8
12
25
ps
tJITTER
Data
Random Jitter (RJ)
Note 9
1
psRMS
Deterministic Jitter (DJ)
Note 10
10
psPP
Clock
Cycle-to-Cycle Jitter
Note 11
1
psRMS
Total Jitter (TJ)
Note 12
10
psPP
Crosstalk-Induced Jitter
Channel-to-Channel (Within-bank)
Note 13, within-bank
0.7
psRMS
tr, tf
Output Rise/Fall Time (20% to 80%)
At full output swing.
50
100
180
ps
Notes:
6.
High-speed AC parameters are guaranteed by design and characterization. VIN swing
≥ 100mV, unless otherwise stated.
7.
Input-to-input skew is the difference in time between two inputs to the output within a bank.
8.
Bank-to-bank skew is the difference in time from input to the output between banks.
9.
Random jitter is measured with a K28.7 character pattern, measured at <fMAX.
10. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 2
23-1 PRBS pattern.
11. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn – Tn-1 where T is the time between rising edges of the
output signal.
12. Total jitter definition: with an ideal clock input of frequency <fMAX, no more than one output edge in 10
12 output edges will deviate by more than
the specified peak-to-peak jitter value.
13. Crosstalk is measured at the output while applying two similar differential clock frequencies that are asynchronous with respect to each other
at the inputs.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY88347DL | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 3.2Gbps PECL Limiting Post Amplifier with High-Gain TTL Loss-of-Signal |
| SY88347DLEY | 功能描述:限幅放大器 3.3V 155-3200 Mbps PECL Post Amp: 4xLOSgain/20xTC/10 EP-MSOP/M’Tin/Bulk no 50 Ohms(I Temp, Lead Free) RoHS:否 制造商:Micrel 輸入電壓范圍（最大值）:3.6 V 工作電源電壓:3.3 V 電源電流:40 mA 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:MSOP-10 封裝:Tube |
| SY88347DLEY TR | 功能描述:限幅放大器 3.3V 155-3200 Mbps PECL Post Amp: 4xLOSgain/20xTC/10 EP-MSOP/T+R(I Temp, Lead Free) RoHS:否 制造商:Micrel 輸入電壓范圍（最大值）:3.6 V 工作電源電壓:3.3 V 電源電流:40 mA 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:MSOP-10 封裝:Tube |
| SY88347DLEYTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V, 3.2Gbps PECL Limiting Post Amplifier with High-Gain TTL Loss-of-Signal |
| SY88349NDL | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5Gbps Burst-Mode Limiting Amplifier |
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