參數(shù)資料
型號(hào): SY88773VKG
廠商: MICREL INC
元件分類: 數(shù)字傳輸電路
英文描述: ATM/SONET/SDH SUPPORT CIRCUIT, PDSO10
封裝: LEAD FREE, MSOP-10
文件頁(yè)數(shù): 7/11頁(yè)
文件大?。?/td> 117K
代理商: SY88773VKG
5
SY88773V
Micrel, Inc.
M9999-072505
hbwhelp@micrel.com or (408) 955-1690
V
CC = 3.0V to 3.6V or 4.5V to 5.5V, TA = –40°C to +85°C, RLOAD = 50 to VCC; typical values at VCC = 3.3V, TA = 25°C.
Symbol
Parameter
Condition
Min
Typ
Max
Units
PSRR
Power Supply Rejection Ratio
35
dB
t
r,tf
Output Rise/Fall Time
Note 8
60
120
ps
(20% to 80%)
t
JITTER
Deterministic
Note 9
15
psPP
Random
5psRMS
V
ID
Differential Input Voltage Swing
10
1800
mVPP
V
OD
Differential Output Voltage Swing
3.3V, Note 8
700
800
950
mVPP
5V, Note 8
700
800
1020
mVPP
HYS
LOS Hysteresis
Note 10
2
4.6
8
dB
t
OFF
LOS Release Time
0.1
0.5
s
t
ON
LOS Assert Time
0.2
0.5
s
V
SR
LOS Sensitivity Range
Note 11
10
35
mVPP
B
–3dB
–3dB Bandwidth
2.0
GHz
A
V(Diff)
Differential Voltage Gain
32
38
dB
S
21
Single-Ended Small-Signal Gain
26
32
dB
Notes:
8. Amplifier in limiting mode. Input is a 200MHz square wave, t
r < 300ps.
9. Deterministic jitter measured using 2.488Gbps K28.5 pattern, V
ID = 10mVPP. Random jitter measured using 2.488Gbps K28.7 pattern, VID = 10mVPP.
10. Electrical signal.
11. This is the detectable range of input amplitudes that can assert LOS. The input amplitude to de-assert LOS is 2–8dB higher than the assert
amplitude. See “Typical Operating Characteristics” for graphs showing how to choose a particular V
LOSLVL or RLOSLVL for a particular LOS assert,
and its associated de-assert, amplitude. If increased LOS sensitivity and hysteresis are required, an application note entitled “Notes on Sensitivity
and Hysteresis in Micrel Post Amplifiers” is available at http://www.micrel.com/product-info/app_hints+notes.shtml.
AC ELECTRICAL CHARACTERISTICS
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