參數資料
| 型號： | SY88893VKG |
| 廠商： | Micrel Inc |
| 文件頁數： | 3/8頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC POST AMP PECL LP LIMIT 10MSOP |
| 標準包裝： | 100 |
| 類型： | 限幅后置放大器 |
| 應用： | 光纖學網絡 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 10-MSOP |
| 包裝： | 管件 |
| 產品目錄頁面： | 1089 (CN2011-ZH PDF) |
| 其它名稱： | 576-2548 SY88893VKG-ND |
Micrel, Inc.
SY898535L
June 2011
3
M9999-062211-B
hbwhelp@micrel.com
Pin Configuration
20-Pin TSSOP (K4-20-1)
Pin Description
Pin Number
Pin Name
Pin Function
1
VEE
Ground.
2
CLK_EN
Single-Ended Input: This TTL/CMOS input disables and enables the Q0-Q3 outputs. It is
internally connected to a 51k pull-up resistor and will default to a logic HIGH state if left open.
When disabled, Q goes LOW and /Q goes HIGH. CLK_EN being synchronous, outputs will be
enabled/disabled following a rising and a falling edge of the input clock. VTH = is approximately
1.5V.
3
CLK_SEL
Single-Ended Input: This single-ended TTL/CMOS-compatible input selects the input to the
multiplexer. If HIGH, selects CLK1 input. When LOW, it selects CLK0 input. Note that this input
is internally connected to a 51k pull-down resistor and will default to logic LOW state if left
open. VTH = is approximately 1.5V.
4
CLK0
Single-Ended Input: This LVCMOS or LVTTL signal is the input signal to the device. It is
internally connected to a 51k pull-down resistor and will default to a logic LOW state if left
open. This input is selected when CLK_SEL is set to logic LOW.
6
CLK1
Single-Ended Input: This LVCMOS or LVTTL signal is the input signal to the device. It is
internally connected to a 51k pull-down resistor and will default to a logic LOW state if left
open. This input is selected when CLK_SEL is set to logic HIGH.
5, 7, 8, 9
NC
Unused Pins
10, 13, 18
VCC
Positive Power Supply Pins: Bypass with 0.1F||0.01F low ESR capacitors as close to the VCC
pins as possible.
20, 19
17, 16
15, 14
12, 11
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
LVPECL Differential Output Pairs: Differential buffered output copies the selected input signal.
The output swing is typically 800mV. Unused output pairs may be left floating with no impact on
jitter. These differential LVPECL outputs are a logic function of the CLK0 and CLK1 inputs. See
“Truth Table” below.
or (408) 955-1690
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相關代理商/技術參數 |
參數描述 |
|---|---|
| SY88893VKG TR | 功能描述:限幅放大器 3.3V/5V 155Mbps PECLPost Amplifier: 1xSD gain/1xTC/10 MSOP/T+R (I Temp, Green) RoHS:否 制造商:Micrel 輸入電壓范圍（最大值）:3.6 V 工作電源電壓:3.3 V 電源電流:40 mA 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:MSOP-10 封裝:Tube |
| SY88893VKGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V/5V 155Mbps PECL LOW-POWER LIMITING POST AMPLIFIER W/TTL SIGNAL DETECT |
| SY88893VKI | 功能描述:IC AMP POST PECL 3.3V/5V 10-MSOP RoHS:否 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:60 系列:- 類型:可變增益放大器 應用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應商設備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| SY88893VKI TR | 功能描述:IC AMP POST PECL 3.3V/5V 10-MSOP RoHS:否 類別:集成電路 (IC) >> 線性 - 放大器 - 專用 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:60 系列:- 類型:可變增益放大器 應用:CATV 安裝類型:表面貼裝 封裝/外殼:20-WQFN 裸露焊盤 供應商設備封裝:20-TQFN-EP（5x5） 包裝:托盤 |
| SY88902 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:LASER DIODE DRIVER WTIH OUTPUT ENABLE |
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