參數(shù)資料
型號(hào): SY88993VKG
廠商: Micrel Inc
文件頁(yè)數(shù): 6/8頁(yè)
文件大?。?/td> 0K
描述: IC POST AMP CML LIMITING 10-MSOP
標(biāo)準(zhǔn)包裝: 100
類型: 限幅后置放大器
應(yīng)用: 光纖學(xué)網(wǎng)絡(luò)
安裝類型: 表面貼裝
封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 10-MSOP
包裝: 管件
產(chǎn)品目錄頁(yè)面: 1090 (CN2011-ZH PDF)
其它名稱: 576-2554
SY88993VKG-ND
Micrel, Inc.
SY56216R
November 2010
6
M9999-111810-A
hbwhelp@micrel.com
Interface Applications
For Input Interface Applications see Figures 4a
through 4e. For CML Output Termination see Figures
5a through 5d
CML Output Termination with VCCO 1.2V
For VCCO of 1.2V, Figure 5a, terminate the output
with 50-to-1.2V, DC coupled, not 100 differentially
across the outputs.
If AC-coupling is used, Figure 5d, terminate into 50-
to-1.2V before the coupling capacitor and then
connect to a high value resistor to a reference voltage.
Do not AC couple with internally terminated receiver.
For example, 50 ANY-IN input. AC-coupling will
offset the output voltage by 200mV and this offset
voltage will be too low for proper driver operation. Any
unused output pair needs to be terminated when
VCCO is 1.2V, do not leave floating.
CML Output Termination with 1.8V/2.5V VCCO
For VCCO of 1.8V or 2.5V, Figure 5a and Figure 5b,
terminate
with
either
50-to-VCCO
or
100
differentially across the outputs. AC- or DC-coupling is
fine. See Figure 5c for AC-coupling.
Input AC-Coupling
The SY56216R input can accept AC-coupling from
any driver. Bypass VT with a 0.1F low ESR capacitor
to VCC as shown in Figures 4b and 4c. VT has an
internal high impedance resistor divider as shown in
Figure 2a, to provide a bias voltage for AC-coupling.
Input Termination
From 1.8V CML driver. Terminate with VT tied to 1.8V.
Do not terminate 100 ohms differentially.
From 2.5V CML driver. Terminate with either VT tied
to 2.5V or 100 ohms differentially.
The input cannot be DC-coupled from a 1.2V CML
driver.
Timing Diagrams
Figure 1. Propagation Delay
or (408) 955-1690
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