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參數(shù)資料
| 型號(hào)： | SY89296UTI |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 17/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DELAY LINE 1024TAP 32-TQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | Precision Edge® |
| 標(biāo)片/步級(jí)數(shù)： | 1024 |
| 功能： | 可編程 |
| 延遲到第一抽頭： | 3.2ns |
| 接頭增量： | 10ps |
| 可用的總延遲： | 3.2ns ~ 14.8ns |
| 獨(dú)立延遲數(shù)： | 1 |
| 電源電壓： | 2.375 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-TQFP |
| 供應(yīng)商設(shè)備封裝： | 32-TQFP |
| 包裝： | 托盤 |
Micrel, Inc.
SY89296U
November 2011
9
M9999-112211
hbwhelp@micrel.com or (408) 955-1690
AC Electrical Characteristics
(7) (Continued)
TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
Set-Up Time
D t+o LEN
Note 10
200
D to IN
Note 11
350
tS
/EN to IN
300
ps
Hold Time
LEN to D
200
tH
IN to /EN
Note 12
400
ps
Release Time
/EN to IN
500
SETMAX to LEN
500
tR
SETMIN to LEN
450
ps
Cycle-to-Cycle Jitter
Note 13
2
psRMS
Total Jitter
Note 14
10
psPP
tJITTER
Random Jitter
Note 15
1
psRMS
20% to 80% (Q)
50
85
160
ps
tr, tf
Output Rise/Fall Time
20% to 80% (CASCADE)
90
300
ps
Duty Cycle
45
55
%
fT
FTUNE
0
≤ FTUNE ≤ 1.25V
47
52
Ps/V
Notes:
10. This setup time defines the amount of time prior to the input signal. The delay tap of the device must be set.
11. This setup time defines the amount of the time that /EN must be asserted prior to the next transition of IN, /IN to prevent an output response greater
than
±75mV to the IN, /IN transition.
12. Hold time is the minimum time that /EN must remain asserted after a negative going IN or a positive going /IN to prevent an output response
greater than
±75mV to that IN, /IN transition .
13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles over a random sample of adjacent cycle pairs
Tjitter_cc = Tn Tn + 1, where T is the time between rising edges of the output signal.
14. Total jitter definition: with an ideal clock input, no more than one output edge in 10
12 output edges will deviate by more than the specified peak-to-
peak jitter value.
15. Random jitter definition: jitter that is characterized by a Gaussian distribution, unbounded and is quantified by its standard deviation and mean.
Random jitter is measured with a K28.7 comma defect pattern, measured at 1.5Gbps.
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| SY89296UTI TR | 功能描述:IC DELAY LINE 1024TAP 32-TQFP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 延遲線 系列:Precision Edge® 標(biāo)準(zhǔn)包裝:2,500 系列:- 標(biāo)片/步級(jí)數(shù):- 功能:多個(gè)，不可編程 延遲到第一抽頭:10ns 接頭增量:- 可用的總延遲:10ns 獨(dú)立延遲數(shù):4 電源電壓:4.75 V ~ 5.25 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SOIC 包裝:帶卷 (TR) |
| SY89296UTITR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5V/3.3V 1.5GHz PRECISION LVPECL PROGRAMMABLE DELAY WITH FINE TUNE CONTROL |
| SY89297U | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5/3.3V, 3.2Gbps Precision CML |
| SY89297UMG | 功能描述:延遲線/計(jì)時(shí)元素 2.5/3.3V Dual Channel Delay Line with 5ps Step Delay (improved SY89295), Industrial, Recommended for New Designs RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
| SY89297UMG TR | 功能描述:延遲線/計(jì)時(shí)元素 2.5/3.3V Dual Channel Delay Line with 5ps Step Delay (improved SY89295), Industrial, Recommended for New Designs RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
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