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參數(shù)資料
| 型號： | SY89827LHG |
| 廠商： | MICREL INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 89827 SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64 |
| 封裝： | LEAD FREE, TQFP-64 |
| 文件頁數(shù)： | 9/11頁 |
| 文件大小： | 747K |
| 代理商： | SY89827LHG |
7
Precision Edge
SY89827L
Micrel, Inc.
M9999-061306
hbwhelp@micrel.com or (408) 955-1690
VCCI = 3.3V ±5%, VCCO = 1.8V ±10%, TA = –40°C to +85°C, all outputs loaded, unless noted.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Toggle Frequency
Note 2
500
MHz
tPD
Differential Propagation Delay
Note 3
1.0
1.3
1.5
ns
VPP
Minimum Input Swing, Note 4
HSTL
200
mV
PECL
150
mV
t
SW
Switchover Time
CLK_SEL-to-Q
1.6
2.0
ns
SEL-to-Q
1.4
1.75
ns
tJITTER
Cycle-to-Cycle
Note 8
<1
ps
RMS
Total Jitter
Note 9
<10
ps
PP
tS(OE)
Output Enable Set-Up Time
Note 5
1.0
ns
tH(OE)
Output Enable Hold Time
Note 5
0.5
ns
tskew
Within Device Skew
Note 6
0°C to +85°C25
50
ps
–40°C35
75
ps
Part-to-Part Skew
Note 7
400
ps
tr, tf
Output Rise/Fall Times
450
700
ps
(20% to 80%)
Note 1.
Outputs loaded with 50-t- ground.
Note 2.
fMAX is defined as the maximum toggle frequency, measured with a 750mV LVPECL/HSTL input. HSTL output swing is > 400mV.
Note 3.
Differential propagation delay is defined as the delay from the crossing point of the differential input signals to the crossing point of the differential
output signals.
Note 4.
The VPP (min.) is defined as the minimum input differential voltage which will cause no increase in the propagation delay.
Note 5.
OE set-up time is defined with respect to the rising edge of the clock. OE HIGH-to-LOW transition ensures outputs remain disabled during the next
clock cycle. OE LOW-to-HIGH transition enables normal operation of the next input clock.
Note 6.
The within-device skew is defined as the worst case difference between any two similar delay paths within a single device operating at the same
voltage and temperature. This parameters includes within bank skew and bank-to-bank skew.
Note 7.
The part-to-part skew is defined as the absolute worst case difference between any two delay paths on any two devices operating at the same voltage
and temperature.
Note 8.
Cycle-to-cycle jitter definition: The variation in period between adjacent cycles over a random sample of adjacent cycle pairs. TJITTER_CC =Tn–Tn+1
where T is the time between rising edges of the output signal.
Note 9.
Total jitter definition: with an ideal clock input, no more than one output edge in 1012 output edges will deviate by more than the specified peak-
to-peak jitter value.
AC ELECTRICAL CHARACTERISTICS(NOTE 1)
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相關代理商/技術參數(shù) |
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| SY89827LHI | 功能描述:IC CLK FANT BUF MUX TRNSL 64TQFP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘緩沖器，驅動器 系列:Precision Edge® 標準包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復用器 電路數(shù):1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應商設備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
| SY89827LHITR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 500MHz DUAL 1:10 HSTL FANOUT BUFFER/TRANSLATOR WITH 2:1 MUX INPUT |
| SY89827LHY | 功能描述:時鐘緩沖器 3.3V Dual 1:20 Diff HSTL Fanout Buffer (I Temp, Lead Free) RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SY89827LHY TR | 功能描述:時鐘緩沖器 3.3V Dual 1:20 Diff HSTL Fanout Buffer (I Temp, Lead Free) RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| SY89827LHYTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:3.3V 500MHz DUAL 1:10 HSTL FANOUT BUFFER/TRANSLATOR WITH 2:1 MUX INPUT |
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