hbwhelp@micrel.com or (408) 955-1690 LVTTL DC Electr" />
參數(shù)資料
型號(hào): SY89834UMI
廠商: Micrel Inc
文件頁數(shù): 6/10頁
文件大?。?/td> 0K
描述: IC CLK BUF MUX TRNSLA 2:4 16-MLF
標(biāo)準(zhǔn)包裝: 100
系列: Precision Edge®
類型: 扇出緩沖器(分配),多路復(fù)用器,變換器
電路數(shù): 1
比率 - 輸入:輸出: 2:4
差分 - 輸入:輸出: 無/是
輸入: LVCMOS,LVTTL
輸出: LVPECL
頻率 - 最大: 1GHz
電源電壓: 2.375 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤,16-MLF?
供應(yīng)商設(shè)備封裝: 16-MLF?(3x3)
包裝: 管件
Micrel, Inc.
SY88149HAL
July 2011
5
M9999-072511-A
hbwhelp@micrel.com or (408) 955-1690
LVTTL DC Electrical Characteristics (Continued)
VCC = 3.0 to 3.6V; TA = –40°C to +85°C, typical values at VCC = 3.3V, TA = 25°C.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
IIH_RESET
RESET Input HIGH Current
VIN = VCC
VIN = 2.7V
300
250
A
IIL_RESET
RESET Input LOW Current
VIN = 0.5V
0
mA
VOH
SD/LOS Output HIGH Level
IOH = 100uA
2.1
2.7
V
VOL
SD/LOS Output LOW Level
IOL = 100uA
0.35
0.5
V
AC Electrical Characteristics
VCC = 3.0V to 3.6V; RLOAD = 50 to VCC – 2V; TA = –40°C to +85°C.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
tr, tf
Output Rise/Fall Time (20% to 80%)
Note 5
260
ps
tJAM
JAM Enable/Disable Time
2
ns
tAUTORESET
SD Deassert or LOS Assert with Auto Reset
Enabled.
100
120
150
ns
tRESET
RESET time constant
Note 6
5
ns
tON
SD Assert Time/LOS Deassert time
5
ns
tJITTER
Deterministic
Random
Note 7
Note 8
15
5
psPP
psRMS
VID
Differential Input Voltage Swing
Figure 1
5
1800
mVPP
VOD
Differential Output Voltage Swing
VID ≥18mVPP
1500
mVPP
SDAL /LOSDL
Low SD Assert/LOS De- Assert Level
RLOS/SDLVL = 10k, Note 9, 10
4
mVPP
SDDL//LOSAL
Low SD Deassert /LOS Assert Level
RLOS/SDLVL = 10k, Note 10
3
mVPP
HYSL
Low SD/LOS Hysteresis
RLOS/SDLVL = 10k, Note 11
2.5
dB
SDAM/LOSDM
Medium SD Assert/LOS Deassert Level
RLOS/SDLVL = 5k, Note 10
4.76
mVPP
SDDM/LOSAM
Medium SD Deassert /LOS Assert Level
RLOS/SDLVL = 5k, Note 10
3.6
mVPP
HYSM
Medium SD/LOS Hysteresis
RLOS/SDLVL = 5k, Note 11
2
3
4
dB
SDAH/LOSDH
High SD Assert/LOS De- Assert Level
RLOS/SDLVL = 50, Note 10
18
mVPP
SDDH/LOSAH
High SD Deassert/ LOS Assert Level
RLOS/SDLVL = 50, Note 10
12.5
mVPP
HYSH
High SD/LOS Hysteresis
RLOS/SDLVL = 50, Note 11
2
3
4
dB
B-3dB
3dB Bandwidth
750
MHz
AV(Diff)
Differential Voltage Gain
48
dB
S21
Single-Ended Small-Signal Gain
42
dB
Notes:
5.
Amplifier in limiting mode. Input is a 200MHz square wave.
6.
The time between applying RESET and outputs being disabled.
7.
Deterministic jitter measured using 1.25Gbps K28.7 pattern, VID = 10mVPP.
8.
Random jitter measured using 1.25Gbps K28.7 pattern, VID = 10mVPP.
9.
SD is the opposite polarity of LOS. Therefore, an SD Assert parameter is equivalent to a LOS deassert parameter and vice versa.
10. See “Typical Operating Characteristics” for a graph showing how to choose a particular RLOS/SDLVL for a particular assert and
its associated deassert amplitude.
11. This specification defines electrical hysteresis as 20log(SD assert/SD deassert). The ratio between optical hysteresis and electrical hysteresis is
found to vary between 1.5 and 2 depending upon the level of received optical power and ROSA characteristics. Based upon that ratio, the optical
hysteresis corresponding to the electrical hysteresis range 3dB
6dB, shown in the AC Characteristics table, will be 1.5dB-4dB optical hysteresis.
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