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參數(shù)資料
| 型號： | SY89837UMY |
| 廠商： | MICREL INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 89837 SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32 |
| 封裝： | 5 X 5 MM, MLF-32 |
| 文件頁數(shù)： | 11/14頁 |
| 文件大小： | 587K |
| 代理商： | SY89837UMY |
6
Precision Edge
SY89837U
Micrel, Inc.
M9999-121605
hbwhelp@micrel.com or (408) 955-1690
Case #4 Input Clock Failure: Switching from the selected
clock input stuck in an undetermined state to a valid clock
input (RPE enabled).
If CLK1 fails to an undetermined state (e.g., amplitude
falls below the 200mV (VIN) minimum single-ended input
limit, or 400mV differentially) before the RPE MUX selects
CLK2 (using the SEL pin), the switchover to the valid clock
CLK2 will occur either following Case #2 or Case #3,
depending upon the last valid state at the CLK1.
If the selected input clock fails to a floating, static, or
extremely low signal swing, including 0mV, the FSI function
will eliminate any metastable condition and guarantee a
stable output signal. No ringing and no undetermined state
will occur at the output under these conditions.
Please note that the FSI function will not prevent duty
cycle distortions or runt pulses in case of a slowly
deteriorating (but still toggling) input signal. Due to the FSI
function, the propagation delay will depend upon rise and
fall time of the input signal and on its amplitude. Refer to
“Operation Characteristics” for detailed information.
CLK1
CLK2
SEL
OUTPUT
Select CLK1
Select CLK2
as in case #2
as in case #3
Figure 4. Timing Diagram 4
POWER-ON RESET (POR) DESCRIPTION
The SY89837U includes an internal power-on reset (POR)
function to ensure the RPE logic starts-up in a known logic
state once the power-supply voltage is stable. An external
capacitor connected between VCC and the CAP pin (pin 10)
controls the delay for the power-on reset function.
Calculation of the required capacitor value is based on
the time the system power supply needs to power up to a
minimum of 2.3V. The time constant for the internal power-
on-reset must be greater than the time required for the
power supply to ramp up to a minimum of 2.3V.
The following term describes this relationship:
CF
tdPS(ms)
12(ms/ F)
()
>
As an example, if the time required for the system power
supply to power up past 2.3V is 12ms, the required capacitor
value on pin 10 would:
CF
12ms
12(ms/ F)
()
>
CF
> 1
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SY89838U | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision 1:8 LVDS Clock Fanout Buffer with 2:1 Runt Pulse Eliminator Input MUX |
| SY89838U_10 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision 1:8 LVDS Clock Fanout Buffer |
| SY89838UMG | 功能描述:編碼器、解碼器、復用器和解復用器 Ultra-low Jitter 1:8 Any-In to LVDS Fanout with 2:1 RPE/FSI Input MUX with Internal Termination RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SY89838UMG TR | 功能描述:編碼器、解碼器、復用器和解復用器 Ultra-low Jitter 1:8 Any-In to LVDS Fanout with 2:1 RPE/FSI Input MUX with Internal Termination RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SY89838UMGTR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Precision 1:8 LVDS Clock Fanout Buffer with 2:1 Runt Pulse Eliminator Input MUX |
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