V
參數(shù)資料
型號: SY89844UMG
廠商: Micrel Inc
文件頁數(shù): 16/18頁
文件大?。?/td> 0K
描述: IC MUX LVDS 2:1 PRECISION 24MLF
標(biāo)準(zhǔn)包裝: 75
系列: SY89
類型: 多路復(fù)用器
電路: 1 x 2:1
獨立電路: 1
電壓電源: 單電源
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 24-VFQFN 裸露焊盤,24-MLF?
供應(yīng)商設(shè)備封裝: 24-MLF?(4x4)
包裝: 管件
產(chǎn)品目錄頁面: 1091 (CN2011-ZH PDF)
其它名稱: 576-1454
Micrel, Inc.
SY89844U
May 2007
M9999-052207-B
hbwhelp@micrel.com or (408) 955-1690
7
AC Electrical Characteristics
(7)
VCC = 2.5V ±5%; RL = 100
across output pair or equivalent; T
A = –40°C to + 85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
fMAX
Maximum Operating Frequency
VOUT
≥ 200mV
1.5
2.0
GHz
tpd
Differential Propagation Delay
VIN = 100mV to 200mV
(8, 9)
470
625
870
ps
In-to-Q
VIN = 200mV to 800mV
(8, 9)
440
575
800
ps
SEL-to-Q
RPE enabled, see Timing Diagram
17
cycles
SEL-to-Q
RPE disabled (VSEL = VCC/2)
550
900
ps
tpd
Tempco
Differential Propagation Delay
Temperature Coefficient
451
fs/
oC
tSKEW
Output-to-Output Skew
Note 10
5
20
ps
Part-to-Part Skew
Note 11
200
ps
tJitter
Random Jitter
Note 12
1
psRMS
Cycle-to-Cycle Jitter
Note 13
1
psRMS
Total Jitter (TJ)
Note 14
10
psPP
Crosstalk-Induced Jitter
Note 15
0.7
psRMS
tr, tf
Output Rise/Fall Time (20% to 80%)
At full output swing.
30
80
150
ps
Notes:
7. High-frequency AC-parameters are guaranteed by design and characterization.
8. Propagation delay is a function of rise and fall time at IN. See “Typical Operating Characteristics” for more details.
9. Propagation delay is measured with input tr, tf
≤ 300ps (20% to 80%) and V
IL
≥ 800mV.
10. Output-to-output skew is measured between two different outputs under identical transitions.
11. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at
the respective inputs.
12. Random Jitter is measured with a K28.7 character pattern, measured at <fMAX.
13. Cycle-to-cycle jitter definition: the variation of periods between adjacent cycles, Tn – Tn-1 where T is the time between rising edges of the
output signal.
14. Total Jitter definition: with an ideal clock input of frequency <fMAX, no more than one output edge in 10
12 output edges will deviate by more
than the specified peak-to-peak jitter value.
15. Crosstalk is measured at the output while applying two similar differential clock frequencies that are asynchronous with respect to each
other at the inputs.
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