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參數(shù)資料
| 型號(hào)： | SY89871UMI |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK BUFF DIVIDER 1:3 16-MLF |
| 標(biāo)準(zhǔn)包裝： | 100 |
| 系列： | Precision Edge® |
| 類型： | 扇出緩沖器（分配），除法器 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:3 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | CML，HSTL，LVDS，LVPECL |
| 輸出： | LVPECL |
| 頻率 - 最大： | 2.5GHz |
| 電源電壓： | 2.375 V ~ 3.63 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤，16-MLF? |
| 供應(yīng)商設(shè)備封裝： | 16-MLF?（3x3） |
| 包裝： | 管件 |
Micrel, Inc.
SY89871U
Oct. 1, 2013
3
M9999-010512-F
hbwhelp@micrel.com or (408) 955-1690
Pin Configuration
Pin Description
Pin Number
Pin Name
Pin Function
1, 2, 3, 4
QB0, /QB0
QB1, /QB1
Differential Buffered Output Clocks: The differential output is a divided-down version of the
input frequency and has a matched output delay with Bank A. Divided by 2, 4, 8, or 16. See
“Truth Table.” Unused output pairs may be left floating.
5, 6
QA, /QA
Differential Buffered Undivided Output Clock.
7, 14
VCC
Positive Power Supply: Bypass with 0.1F and 0.01F low ESR capacitors.
8
/RESET
Output Reset: Internal 25K
Ω pull-up. Logic LOW will reset the divider select. See “Truth Table.”
Input threshold is VCC/2.
12, 9
IN, /IN
Differential Input: Internal 50
Ω termination resistors to VT input. See “Input Interface
Applications” section.
10
VREF-AC
Reference Voltage: Equal to VCC–1.4V (approx.), and used for AC-coupled applications. For
DC-coupled applications, VREF-AC is normally left floating. Maximum sink/source current is
0.5mA. See “Input Interface Applications” section.
11
VT
Input Termination Center-Tap: Each side of differential input pair terminates to this pin. The VT
pin provides a center tap to a termination network for maximum interface flexibility. For CML
and LVDS inputs, leave this pin floating. See “Input Interface Application” section.
13
GND
Ground.
15, 16
S1, S0
Select Pins: See “Truth Table.” LVTTL/CMOS logic levels. Internal 25KΩ pull-up resistor. Logic
HIGH if left unconnected (divided by 16 mode). S0 = LSB. Input threshold is VCC/2.
Truth Table
/RESET
S1
S0
Bank A Output
Bank B Outputs
1
0
Input Clock
2
1
0
1
Input Clock
4
1
0
Input Clock
8
1
Input Clock
16
0
X
Input Clock
QB = LOW, /QB = HIGH
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| SY89871UMI TR | 功能描述:IC CLOCK BUFF DIVIDER 1:3 16-MLF RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘緩沖器，驅(qū)動(dòng)器 系列:Precision Edge® 標(biāo)準(zhǔn)包裝:1 系列:HiPerClockS™ 類型:扇出緩沖器（分配），多路復(fù)用器 電路數(shù):1 比率 - 輸入:輸出:2:18 差分 - 輸入:輸出:是/無 輸入:CML，LVCMOS，LVPECL，LVTTL，SSTL 輸出:LVCMOS，LVTTL 頻率 - 最大:250MHz 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:- 其它名稱:800-1923-6 |
| SY89871UMITR | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5GHz ANY DIFF. IN-TO-LVPECL PROGRAMMABLE CLOCK DIVIDER |
| SY89872U | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5V, 2GHz ANY DIFF. IN-TO-LVDS PROGRAMMABLE CLOCK DIVIDER/FANOUT BUFFER WITH INTERNAL TERMINATION |
| SY89872U_0708 | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:2.5V, 2GHz ANY DIFF. IN-TO-LVDS |
| SY89872UMG | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 2.5V LVDS Output Clock Divider/Fanout (I Temp, Green) RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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