參數(shù)資料
型號: SYS82000RKXDLI-10
英文描述: 2M x 8 SRAM MODULE
中文描述: 200萬× 8的SRAM模塊
文件頁數(shù): 3/7頁
文件大?。?/td> 104K
代理商: SYS82000RKXDLI-10
SYS82000RKXD - 70/85/10/12
Issue 1.3 February 2000
3
* Input pulse levels: 0V to 3.0V
* Input rise and fall times: 5ns
* Input and Output timing reference levels: 1.5V
* Output load: see diagram
* V
CC
=5V±10%
AC Test Conditions
Output Load
Operation Truth Table
645
100pF
I/O Pin
1.76V
Parameter
V
CC
for Data Retention
Data Retention Current
Symbol
V
DR
Test Condition
CS > V
CC
-0.2V
V
CC
= 3.0V, CS > V
CC
-0.2V
T
OP
= 0°C to 40°C
See Retention Waveform
See Retention Waveform
mn
typ
(1)
max
Unit
2.0
-
0
5
-
-
-
-
-
V
μ
A
ns
ms
I
CCDR1
t
CDR
(2)
220
-
-
Chip Deselect to Data Retention Time
Operation Recovery Time
t
R
Notes
(1) Typical figures are measured at 25°C.
(2) This parameter is guaranteed not tested.
Low V
cc
Data Retention Characteristics - L Version Only
CS
OE
WE
DATA PINS
SUPPLY CURRENT
MODE
H
X
X
High Impedance
I
SB1
, I
SB2
, I
SB3
Standby
L
L
H
Data Out
I
CC1
Read
L
H
L
Data In
I
CC1
I
CC1
Write
L
L
L
Data In
Write
L
H
H
High-Impedance
I
SB1
, I
SB2
, I
SB3
High-Z
Notes : H = V
IH
: L =V
IL
: X = V
IH
or V
IL
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