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參數(shù)資料
| 型號： | T15N1M16A-70S |
| 廠商： | TM Technology, Inc. |
| 英文描述： | 64K X 16 LOW POWER CMOS STATIC RAM |
| 中文描述： | 64K的× 16低功耗CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 6/13頁 |
| 文件大小： | 102K |
| 代理商： | T15N1M16A-70S |
TE
CH
tm
AC CHARACTERISTICS
(
Vcc
=
+2.4 to 3.6V
,
(1) READ CYCLE
T15N1M16A
TM Technology Inc. reserves the right
P. 6
to change products or specifications without notice.
Publication Date: JUL . 2002
Revision: A
ss
V
= 0V, Ta = 0 to +70
°
C / -40 to +85
°
C)
-55
-70
-100
PARAMETER
SYM.
Min
55
-
-
-
10
10
-
5
-
-
10
-
Max
-
55
55
25
-
-
20
-
20
55
-
20
Min
70
-
-
-
10
10
-
5
-
-
10
-
Max
-
70
70
35
-
-
25
-
25
70
-
25
Min
100
-
-
-
10
10
-
5
-
-
10
Max
-
100
100
50
-
-
25
-
25
100
25
UNIT
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Output Hold from Address Change
Chip Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Enable to Output in Low-Z
Output Disable to Output in High-Z
LB
,
UB
Access Time
LB
,
UB
Enable to Output in Low-Z
LB
,
UB
Disable to Output in High-Z
(2)WRITE CYCLE
t
RC
t
AA
t
ACE
t
OE
t
OH
t
LZ
t
HZ
t
OLZ
t
OHZ
t
BA
t
BLZ
t
BHZ
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
-55
-70
-100
PARAMETER
SYM.
Min
55
45
45
0
40
0
25
0
0
5
45
Max
-
-
-
-
-
-
-
-
20
-
-
Min
70
60
60
0
50
0
30
0
0
5
60
Max
-
-
-
-
-
-
-
-
20
-
-
Min
100
80
80
0
70
0
40
0
0
5
80
Max
-
-
-
-
-
-
-
-
30
-
-
UNIT
Write Cycle Time
Chip Enable to Write End
Address Valid to Write End
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Valid to Write End
Data Hold Time
Write Enable to Output in High-Z
Output Active from Write End
LB
,
UB
Setup to Write End
t
WC
t
CW
t
AW
t
AS
t
WP
t
WR
t
DW
t
DH
t
WHZ
t
OW
t
BW
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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