參數(shù)資料
型號(hào): T15V4M08A
廠商: TM Technology, Inc.
英文描述: 512K X 8 LOW POWER CMOS STATIC RAM
中文描述: 為512k × 8低功耗CMOS靜態(tài)RAM
文件頁(yè)數(shù): 8/11頁(yè)
文件大?。?/td> 74K
代理商: T15V4M08A
TE
CH
tm
WRITE CYCLE 1
(
WE
Controlled)
Preliminary T15V4M08A
Taiwan Memory Technology, Inc. reserves the right
P. 8
to change products or specifications without notice.
Publication Date: MAR. 2001
Revision:0.A
WRITE CYCLE 2
(CE Controlled)
NOTES ( WRITE CYCLE ) :
1. A write occurs during the overlap of a low
CE
, a low WE. A write begins at the lateat transition
among
CE
goes low, WEgoing low. A write end at the earliest transition among
CE
going
high, WE going high. tWP is measured from the beginning of write to the end of write.
2. tCW is measured from the later of
CE
going low to the end of write.
3. tAS is measured from the address valid to the beginning of write.
4. tWR is measured from the end of write to the address change.
tW C
tWHZ
tDW
DI N
tDH
tWR
tA S
tW P
A d d r e s s
C E
W
E
DO U T
tA W
tC W
tOW
H igh-Z
H i g h - Z
D O N ' T C A R E
U N D E F I N E D
tW C
tD W
DI N
tD H
tW R
tA S
tW P
tC W
A d d r e s s
C E
W
E
DO U T
tA W
H i g h - Z
H i g h - Z
H i g h - Z
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