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參數(shù)資料
| 型號： | T4227-FBG3 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO16 |
| 封裝： | SSOP-16 |
| 文件頁數(shù)： | 8/13頁 |
| 文件大?。?/td> | 105K |
| 代理商： | T4227-FBG3 |
T4227
Rev. A2, 24-Jul-00
Preliminary Information
4 (13)
Figure 8.
PK
Peak detector output: An external capacitor has to be con-
nected to ensure the function of the peak detector. The
value of the capacitance influences the AGC regulation
time.
Figure 9.
VCC, GND
VCC and GND are the supply voltage inputs. To power
down the circuitry it is recommended to use the PDN
input and not to switch the power supply. Switching the
power supply effects in a long power up waiting time.
PON
If PON is connected to GND, the receiver will be
activated. The set-up time is typically 0.5 s after applying
GND at this pin. If PON is connected to VCC, the receiver
will switch to power-down mode.
Figure 10.
OUT1, OUT2
The serial signal of the time-code transmitter can be
directly decoded by a microcomputer. Details about the
time-code format of several transmitters are described
separately.
The output consists of a combination of a NPN / PNP open
collector stage. The function depends on the external
circuitry:
D A load resistor is connected from OUT1 to Vcc, OUT2
is connected to GND. This performs the functionality
of a NPN open collector stage.
D A load resistor is connected from OUT2 to GND,
OUT1 is connected to VCC. This performs the func-
tionality of a PNP open collector stage.
Figure 11.
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