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參數(shù)資料
| 型號： | T66H0004A-T |
| 廠商： | TM Technology, Inc. |
| 英文描述： | 80 output LCD Segment/Common Driver IC |
| 中文描述： | LCD段輸出80 /共同驅(qū)動器IC |
| 文件頁數(shù)： | 6/32頁 |
| 文件大?。?/td> | 602K |
| 代理商： | T66H0004A-T |
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T66H0004A
TM Technology Inc. reserves the right
P. 6
Publication Date: MAR. 2004
to change products or specifications without notice.
Revision:A
tm
TE
CH
PIN DESCRIPTION
Pin
V
DD
Vss
V
EE
I/O
Name
Function
Interface
Logical “High” input port(+5V±10%,+3V±10%)
0V(GND)
Logical “Low” for high voltage part
Bias supply voltage input to drive the LCD. Bias
voltage divided by the resistance is usually used as a
supply voltage source (refer to NOTE 2).
Display data output pin which corresponds to the
respective latch contents. One of V0, V12, V34 and V5
is selected as a display driving voltage source
according to the combination of the latch data level
and M signal (refer to NOTE 1).
Clock pulse input for the bi-directional shift register.
- In segment driver application mode, the data is
shifted to 20x4-bit segment data shift.
The clock pulse, which was input when the enable bit
(ELB/ERB) is in not active condition, is invalid.
- In common driver application mode, the data is
shifted to 80-bit common data bi-directional shift
register by the CL1 clock.
Hence, this clock pin is not used (Open or connect this
pin to VDD).
Alternate signal input pin for LCD driving.
Normal frame inversion signal is input in to this pin.
Power supply
Power
V0,V12,
V43,V5
I
LCD driver
output voltage
level
Power
SC1-SC80
O
LCD driver
output
LCD
CL2
I
Data shift
clock
Controller
M
I
AC signal for
LCD driver
output
Controller
CL1
I
Data latch
clock
- In segment driver application mode, this signal is
used for latching the shift register contents at the
falling edge of this clock pulse.
CL1 pulse “High” level initializes power-down
function block.
- In common driver application mode, CL1 is used as a
shifting clock of common output data.
Control input pin to fix the driver output (SC1-SC80)
to V0 level, during “Low” value input. LCD becomes
non-selected by V0 level output from every output of
segment drivers and every output of common drivers.
When CS = ”Low”, T66H0004A is used as an 80-bit
segment driver.
When CS = ”High”, T66H0004A is set to an 80-bit
common driver.
According to the input value of the AMS and the CS
pin, application mode of T66H0004A is differs as
shown below.
CS AMS
Application mode
0
0
4-bit parallel interface mode
Controller
DISPOFFB
I
Display OFF
control
Controller
CS
I
COM/SEG
mode control
VDD/VSS
0
1
1-bit serial interface mode
SEG
1
0
Single type application mode
AMS
I
Application
mode select
1
- In segment driver application mode, these pins are
1
Dual type application mode
COM
VDD/VSS
D1_SID,
D2_DL,
I/O
Display data
input/serial
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