參數(shù)資料
型號: T6818
廠商: Atmel Corp.
英文描述: Triple Halfbridge DMOS OUTPUT DRIVER WITH SERIAL INPUT CONTROL
中文描述: 三Halfbridge的DMOS輸出驅(qū)動器,串行輸入控制
文件頁數(shù): 6/16頁
文件大?。?/td> 469K
代理商: T6818
6
T6818/T6828
4530C–BCD–11/03
Power-supply Fail
In case of undervoltage at pin VS, the Power-Supply Fail bit (PSF) in the output register
is set and all outputs are disabled. To detect an undervoltage, its duration has to last
longer than the undervoltage detection delay time t
dUV
. The outputs are enabled immedi-
ately when supply voltage recovers normal operation value. The PSF bit stays high until
it is reset by the SRR bit in the input register.
Open-load Detection
If the current through a high-side or low-side switch in ON-state stays below the open-
load detection threshold, the open-load detection bit (OPL) in the output register is set.
The OPL bit stays high until it is reset by the SRR bit in the input register. To detect an
open load, its duration has to last longer than the open-load detection delay time t
dSd
.
Overtemperature
Protection
If the junction temperature of one or more output stages exceeds the thermal prewarn-
ing threshold, T
jPW set
, the temperature prewarning bit (TP) in the output register is set.
When the temperature falls below the thermal prewarning threshold, T
jPW reset
, the bit TP
is reset. The TP bit can be read without transferring a complete 16-bit data word. The
status of TP is available at pin DO with the falling edge of CS. After the microcontroller
has read this information, CS is set high and the data transfer is interrupted without
affecting the status of input and output registers.
If the junction temperature of one or more output stages exceeds the thermal shutdown
threshold, T
j switch off
, all outputs are disabled and the corresponding bits in the output
register are set to low. The outputs can be enabled again when the temperature falls
below the thermal shutdown threshold, T
jswitchon
and the SRR bit in the input register is
set to high. Hysteresis of thermal prewarning and shutdown threshold avoids
oscillations.
Short-circuit Protection
The output currents are limited by a current regulator. Overcurrent detection is activated
by writing a high to the OCS bit in the input register. When the current in an output stage
exceeds the overcurrent limitation and shutdown theshold, it is switched off after a delay
time (t
dSd
). The short-circuit detection bit (SCD) is set and the corresponding status bit in
the output register is set to low. For OCS = low the overcurrent shutdown is inactive.
The SCD bit is also set if the current exceeds the overcurrent limitation and shutdown
threshold, but the outputs are not affected. By writing a high to the SRR bit in the input
register the SCD bit is reset and the disabled outputs are enabled.
Inhibit
0 V applied to pin 10 (INH) inhibits the T6818/T6828.
All output switches are then turned off and switched to tristate. The data in the output
register are deleted. The current consumption is reduced to less than 5 μA at pin VS and
less than 25 μA at pin VCC. The output switches can be activated again by switching pin
10 (INH) to 5 V which initiates an internal power-on reset.
相關(guān)PDF資料
PDF描述
T6818-TUQ Triple Halfbridge DMOS OUTPUT DRIVER WITH SERIAL INPUT CONTROL
T6818-TUS Triple Halfbridge DMOS OUTPUT DRIVER WITH SERIAL INPUT CONTROL
T6828-TUQ Triple Halfbridge DMOS OUTPUT DRIVER WITH SERIAL INPUT CONTROL
T6828-TUS Triple Halfbridge DMOS OUTPUT DRIVER WITH SERIAL INPUT CONTROL
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