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參數(shù)資料
| 型號(hào)： | T7288 |
| 廠商： | Lineage Power |
| 英文描述： | CEPT/E1 Line Interface(CEPT/E1 線接口) |
| 中文描述： | CEPT/E1線路接口（CEPT/E1線接口） |
| 文件頁數(shù)： | 14/22頁 |
| 文件大小： | 432K |
| 代理商： | T7288 |
Data Sheet
January 1998
T7288 CEPT/E1 Line Interface
14
Lucent Technologies Inc.
Electrical Characteristics
T
A
= –40
°
C to +85
°
C; V
DD
= 5 V
±
10%.
Table 9. Logic Interface Electrical Characteristics
* Digital outputs drive purely capacitive loads to full output levels (V
DDD
, GND
D
).
Internal pull-up resistors are provided on the following input leads:
LP1
,
LP2
,
LP3
, and
ALMT
. Internal pull-down
devices are provided on the following leads: SD, RBC, HDB3/TNDATA, TBC,
SR
/DR, FLM, and ZS. The internal
pull-up or pull-down devices require the input to source or sink to be no more than 20
μ
A.
Table 10. Transmitter Specifications
* Percentage of the nominal pulse amplitude.
Parameter
Input Voltage:
Low
High
Output Voltage*:
Low
High
Input Capacitance
Load Capacitance
Symbol
Conditions
Min
Max
Unit
V
IL
V
IH
—
—
GND
D
2.0
0.8
V
DDD
V
V
V
OL
V
OH
C
I
C
L
2.0 mA sink
80
μ
A source
—
—
GND
D
2.4
—
—
0.4
V
DDD
20
40
V
V
pF
pF
Parameter
Min
Typ
Max
Unit
Output Pulse Amplitude:
75
(ZS = 0)
120
(ZS = 1)
Pulse Width (50%)
Positive/Negative Pulse Imbalance
Zero Level
Output Transformer Turns Ratio
2.14
2.70
219
—
—
1:1.33
2.37
3.0
244
—
—
1:1.36 1:1.39
2.60
3.30
269
±
5
±
10
V
V
ns
%
%*
—
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