參數資料
型號： T7531A
廠商： Lineage Power
元件分類： Codec
英文描述： 16-Channel Programmable Codec Chip Set(十六通道可編程編解碼器芯片組)
中文描述： 16通道可編程解碼器芯片組（十六通道可編程編解碼器芯片組）
文件頁數： 42/44頁
文件大?。?/td> 772K
代理商： T7531A
42
Lucent Technologies Inc.
Data Sheet
February 1999
Codec Chip Set
T7531A/T7536 16-Channel Programmable
Applications
Figure 11 shows a full line card implementation using
the T7531A/T7536 codec and the L7585 SLIC with
integrated relays. One T7531A and two T7536 devices
support 16 SLIC devices (only one L7585 SLIC is illus-
trated). Figure 11 portrays only the transmission paths
inside the L7585 SLIC. L7585 functionality includes
eight solid-state relays, performing ring, test, and break
functions, a ring-trip detector, quiet polarity reversal, 13
operating states, and more. For complete functionality
of this SLIC, refer to the L7585 data sheet.
The analog connection between the SLIC and the
codec is direct; no external components are required.
The transfer of control data on the octal interface
between the T7531A and T7536 devices is also direct.
Data is synchronous with OSCK and transmits at a
4.096 MHz rate. The microprocessor control interface
is a standard 4-wire serial port connection, micropro-
cessor clock (UPCK), chip select (UPCS), data input
(UPDI), and output (UPDO). The T7531A generates a
16 MHz clock for microprocessor use. This clock is
always present. The PCM interface consists of a
system clock (SCK) input of either 2.048 MHz or
4.096 MHz, an 8 kHz system frame sync (SFS) input, a
system data transmit port (DX), and a system data
receive (DR) port. Other than power supply decoupling,
the only external components required by the codec
chip set are the two 6.8 k
resistors and the three
0.1 μF capacitors. These are required by the internal
clock synthesizer filter circuit of the T7531A. The clock
synthesizer generates a 98.304 MHz master clock for
DSP use.
12-3351.d (F)
* Optional for quiet reverse battery.
4.096 MHz operation; for 2.048 MHz operation, tie SCKSEL to V
SS
.
Figure 11. 16-Channel Line Card Solution
OSFS
OSCK
OSDR0
OSDR1
OSDX0
OSDX1
CCS0
CDO
CDI
CT7536
DSP
T7531A
UPCK
UPCS
UPDI
UPDO
CK16
SCK
SFS
SDR
SDX
STSXB
BUS
T7536
OSDX2
OSDX3
OSDR2
OSDR3
PCM
INTERFACE
ICONTROL
OCTAL
INTERFACE
OSDX2
OSDX3
OSDR2
OSDR3
CDO
OSFS
CDI
OSCK
OSFS
OSCK
OSDR0
OSDR1
OSDX0
OSDX1
CCS0
CDI
CDO
CCS1
CCS1
DGND
VCCD
RDO
TRNG
RRNG
RSW
RTS
PR
PT
RTI
TTI
CLK
VSP VBAT
BGND VCCA AGND
NDET NCSB5 B4 B3 B2 B1 B0
28
27
14
16
FB1
FB2
CF1
CF2
DCR
DCOUT
IPROG
LCTH
RCVN
RCVP
VTX
VRTX
TXI
VITR
ITR
RK1
CVD
μ
F
CRTF
μ
F
RS1
1 M
260 V
PSURGE
RPR
RPT
TEBUS
1 MHz
RINBUS
CVB
μ
F
–48 V
CVA
0.1
μ
F
+5 V
1
+10 V
FB2*
μ
F
9
8
7
6
5
4
3
2
CF1
μ
F
CF2
0.1
μ
F
RPROG 64.9 k
RLCTH 24.9 k
+5 V
CB1
μ
F
L7585
18
33
PARALLEL DATA BUS TO MICROPROCESSOR
0.1
μ
F
+5 V
0.1
μ
F
+5 V
RSTB
SCKSEL
RSTB
FILT1
FILT2
0.1
μ
F
6.8 k
FILT3
6.8 k
0.1
μ
F
0.1
μ
F
CH8—15
CH1—7
+5 V
+5 V
CHA0
VRN0
VRP0
VTX0
VRTX0
TEST
TEST
VDDD
RSTB
RSTB
RSTB
0.1
μ
F
0.1
μ
F
VSS
FVSS
0.1
μ
F
+5 V
0.1
μ
F
VDD
2.4 V
RGX1
8.25 k
TIP
RING
FB1*
μ
F
32
31
30
29
V
V
V
V
13
35
12
11
10, 36
44
17, 34
26
21
20
19
22
25
23
24
15
37
38
39
41
40
42
43
V
V
V
V
FVDD
PRMICRO-
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