TE
CH
tm
10.6 Pulsed Width Modulator (PWM)
The T81L0006A/B provides 2 channels 8 bits PWM output for peripheral. The frequency source of the PWM counter comes
from Fosc. Writing 1 to PWMC register enable bit will enable the PWM output function. PWMPS2:1:0 control bit determine
PWM output clock that range from Fosc/2 to Fosc/256. Each PWM output clock duty cycle can be programmed though set
PWM0 or PWM1 register.
PWM Register Control
Default
B7: R/W
B6: R/W
B5: R/W
PWMC1
0x00
Pwm2EN
Pwm2PS2
Pwm2PS1
Default
PWMC2
0x00
-
-
-
T81L0006A/B
TM Technology Inc. reserves the right
P. 19
Publication Date: AUG. 2005
to change products or specifications without notice. Revsion : B
B4: R/W
Pwm2PS0
-
B3: R/W
Pwm1EN
-
B2: R/W
Pwm1PS2
-
B1: R/W
Pwm1PS1
-
B0: R/W
Pwm1PS0
R/W
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PWM1
PWM2
0x00
0x00
PWMC1: PWM control register1
Pwm1EN, Pwm2EN
PWM1, PWM2 Enable bit: 0-Disable, 1-Enable
When Enable bit=0, PWM output pin = High impedance.
PWMPS2:1:0 --- PWM dividers ratio
Fpwm= Fosc/PWMPS/256 while select 8-bit mode
Fpwm= Fosc/PWMPS/65536 while select 16-bit mode
PWMC2: PWM control register2 Mode
PWM 16-bit mode or 8-bit mode selects : ‘0’= 8-bit mode, ‘1’= 16-bit mode
When select 16-bit mode, PWM2 register= PWM duty cycle value high byte.
PWM1 register= PWM duty cycle value low byte.
Note: 16-bit PWM just for PWM1 output
PWM1 register:
Set PWM1’s duty cycle. --- Duty1= PWM1/256 or 16-bit PWM duty cycle value low byte.
PWM2 register:
Set PWM2’s duty cycle. --- Duty2= PWM2/256 or 16-bit PWM duty cycle value high byte.
Set 16-bit PWM duty cycle. --- Duty= (PWM2, PWM1)/65536
PS:2:1:0
000
001
010
011
100
101
110
111
Dividers ratio Fpwm:Fosc
1:2
1:4
1:8
1:16
1:32
1:64
1:128
1:256