TE
CH
tm
!
Special Function Registers
a) Interrupt Enable 0 register (ien0)
The ien0 register (address : A8)
MSB
eal
wdt
The ien0 bit functions
Bit
Symbol
T81L0006A/B
TM Technology Inc. reserves the right
P. 14
Publication Date: AUG. 2005
to change products or specifications without notice. Revsion : B
LSB
ex0
et2
es0
et1
ex1
et0
Function
Watchdog timer refresh flag.
Set to initiate a refresh of the watchdog timer. Must be set directly before swdt is set to
prevent an unintentional refresh of the watchdog timer. The wdt is reset by hardware 12
instruction cycles after it has been set.
Note: other bits are not used to watchdog control
b) Interrupt Enable 1 register (ien1)
The ien1 register (Address : B8)
MSB
-
swdt
pt2
ps
The ien1 bit functions
Bit
Symbol
Function
Ien1.6
swdt
Watchdog timer start refresh flag.
Set to active/refresh the watchdog timer. When directly set after setting wdt, a watchdog
timer refresh is performed. Bit swdt is reset by hardware 12 instruction cycles after it has
been set.
Pay attention that when write ien1.6, it write the swdt bit, when read ien1.6, we will read out the wdts bit. Ie. Watch
dog timer status flag. Set by hardware when the watchdog timer was started.
d) Watchdog Timer Reload register (wdtrel)
The wdtrel register ( Address : 86 )
MSB
7
6
5
4
The wdtrel bit functions
Bit
Symbol
Function
Prescaler select bit. When set, the watchdog is clocked through an additional
divide-by-16 prescaler
Seven bit reload value for the high-byte of the watchdog timer. This value is
loaded to the wdt when a refresh is triggered by a consecutive setting of bits
wdt and swdt
ien0.6
wdt
LSB
px0
pt1
px1
pt0
LSB
0
3
2
1
wdtrel.7
7
wdtrel.6 t0
wdtrel.0
6-0
The wdtrel register can be loaded and read any time