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參數(shù)資料
| 型號： | T8535 |
| 廠商： | Lineage Power |
| 元件分類： | Codec |
| 英文描述： | Quad Programmable Codec(四通道可編程編解碼器) |
| 中文描述： | 四可編程編解碼器（四通道可編程編解碼器） |
| 文件頁數(shù)： | 5/54頁 |
| 文件大?。?/td> | 1872K |
| 代理商： | T8535 |
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Preliminary Data Sheet
July 2000
Lucent Technologies Inc.
5
T8535/T8536 Quad Programmable Codec
General Description
Refer to Figure 1 for the following discussion.
5-8125aF
* Second PCM port not available in all package types.
Figure 1. Functional Block Diagram, Each Section
RST
SLIC
TO/FROM
ANALOG
GAIN
A/D
CONVERTER
ANALOG
BUFFER
D/A
CONVERTER
D
L
A
L
D
L
TERMINATION
IMPEDANCE
HYBRID
BALANCE
NETWORK
DIGITAL GAIN
(GAIN TRANSFER)
μ
-LAW
OR
A-LAW
PER
CHANNEL
COMMON
A
L
D
L
PCM BUS
INTERFACE
DX0
DX1*
TSX0*
TSX1*
DR1*
TO/FROM
PCM BUS
POWER AND
GROUND
18
FS
BCLK
SLIC
CONTROL LATCHES
MICROPROCESSOR CONTROL
CONTROL AND DATA SIGNALS
4
SERIAL
CONTROL
INTERFACE
PER
CHANNEL
COMMON
0 TO 6
FREQUENCY
SYNTHESIZER
0 TO 3
FILTER
CONVERSION
DIGITAL GAIN
(GAIN TRANSFER)
DR0
VF
R
OPn
VF
R
ONn
VF
X
In
This device performs virtually all the signal processing
functions associated with a central office line termina-
tion. Functionality includes line termination impedance
synthesis, fixed hybrid balance impedance synthesis,
and level conversion both in the analog sense to
accommodate various subscriber line interface circuits
(SLICs) and in the digital sense for adjustment of the
levels on the PCM bus. In general, the termination
impedance synthesis generates the equivalent of a cir-
cuit with the parallel combination of a capacitor and a
resistor in series with a resistor or the parallel combina-
tion of a resistor and the series combination of a resis-
tor and capacitor. These general forms of impedance
characteristic will satisfy most of the requirements
specified throughout the world. Programmable selec-
tion of either
μ
-law or A-law encoding further aids
worldwide deployment. All coefficients used in the filter-
ing algorithms can be computed off-line in advance and
downloaded to the device at the time of powerup. All
signal processing is contained within the device, and
there are only three interfaces of consequence to the
system designer: the SLIC interface, the PCM inter-
face, and the control interface.
The SLIC interface is designed to be flexible and con-
venient to use with a variety of SLIC circuits. With an
appropriate choice of SLIC, no external components
are required in the interface, with the exception of a dc
blocking capacitor in the transmit direction. In some
cases, dc blocking capacitors in the receive direction
may be necessary as well, since the device operates
from a single low-voltage supply.
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