OSCCON: OSCILLATOR CONTROL REGISTER
參數(shù)資料
型號： T89C5115-TISUM
廠商： Atmel
文件頁數(shù)： 10/113頁
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 16K 28SOIC
標(biāo)準(zhǔn)包裝： 27
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 20
程序存儲器容量： 16KB（16K x 8）
程序存儲器類型： 閃存
EEPROM 大小： 2K x 8
RAM 容量： 512 x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 28-SOIC（0.295"，7.50mm 寬）
包裝： 管件
其它名稱： 89C5115-TISUM
2007-2011 Microchip Technology Inc.
DS70265E-page 107
dsPIC33FJ12MC201/202
REGISTER 8-1:
OSCCON: OSCILLATOR CONTROL REGISTER(1,3)
U-0
R-0
U-0
R/W-y
—
COSC<2:0>
—
NOSC<2:0>(2)
bit 15
bit 8
R/W-0
R-0
U-0
R/C-0
U-0
R/W-0
CLKLOCK
IOLOCK
LOCK
—CF
—
LPOSCEN
OSWEN
bit 7
bit 0
Legend:
y = Value set from Configuration bits on POR
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
Unimplemented:
Read as ‘0’
bit 14-12
COSC<2:0>:
Current Oscillator Selection bits (read-only)
111
= Fast RC oscillator (FRC) with Divide-by-n
110
= Fast RC oscillator (FRC) with Divide-by-16
101
= Low-Power RC oscillator (LPRC)
100
= Secondary oscillator (SOSC)
011
= Primary oscillator (XT, HS, EC) with PLL
010
= Primary oscillator (XT, HS, EC)
001
= Fast RC oscillator (FRC) with Divide-by-n plus PLL
000
= Fast RC oscillator (FRC)
bit 11
Unimplemented:
Read as ‘0’
bit 10-8
NOSC<2:0>:
New Oscillator Selection bits (2)
111
= Fast RC oscillator (FRC) with Divide-by-n
110
= Fast RC oscillator (FRC) with Divide-by-16
101
= Low-Power RC oscillator (LPRC)
100
= Secondary oscillator (SOSC)
011
= Primary oscillator (XT, HS, EC) with PLL
010
= Primary oscillator (XT, HS, EC)
001
= Fast RC oscillator (FRC) with Divide-by-n plus PLL
000
= Fast RC oscillator (FRC)
bit 7
CLKLOCK:
Clock Lock Enable bit
If clock switching is enabled and FSCM is disabled, (FOSC<FCKSM> = 0b01)
1
= Clock switching is disabled, system clock source is locked
0
= Clock switching is enabled, system clock source can be modified by clock switching
bit 6
IOLOCK:
Peripheral Pin Select Lock bit
1
= Peripherial pin select is locked, write to peripheral pin select registers not allowed
0
= Peripherial pin select is not locked, write to peripheral pin select registers allowed
bit 5
LOCK:
PLL Lock Status bit (read-only)
1
= Indicates that PLL is in lock, or PLL start-up timer is satisfied
0
= Indicates that PLL is out of lock, start-up timer is in progress or PLL is disabled
bit 4
Unimplemented:
Read as ‘0’
Note 1:
Writes to this register require an unlock sequence. Refer to Section 7. “Oscillator” (DS70186) in the
“dsPIC33F/PIC24H Family Reference Manual”
(available from the Microchip web site) for details.
2:
Direct clock switches between any primary oscillator mode with PLL and FRCPLL mode are not permitted.
This applies to clock switches in either direction. In these instances, the application must switch to FRC
mode as a transition clock source between the two PLL modes.
3:
This register is reset only on a Power-on Reset (POR).
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